Abstract: A wearable device and a power distribution method in a wearable device are provided. The wearable device includes a battery, load circuitry configured to operate by using power supplied from the battery, step-down circuitry connected to a power input terminal of the load circuitry, step-up circuitry connected to a power output terminal of the load circuitry, and a processor configured to obtain a first power loss value while distributing the power from the battery to an electrical component through an operation of the step-down circuitry and the step-up circuitry, obtain a second power loss value during power distribution while distributing the power from the battery to the electrical component, and control the power from the battery to be distributed to the electrical component through the step-up circuitry and the step-down circuitry or control the power from the battery to be distributed to the electrical component.

Abstract: A substrate including: an insulation layer; a conductive layer disposed on the insulation layer; and a via hole configured to include a lower hole disposed in a first portion of the insulation layer and an upper hole disposed in a second portion of the insulating layer and connected to the lower hole, wherein a width of the upper hole is greater than that of the lower hole, at least a portion of the upper hole of the insulation layer has a width that is substantially equal to that of the upper hole of the conductive layer, and a first angle formed between a first direction that is parallel to a lower surface of the insulating layer and a sidewall of the lower hole and a second angle formed between the first direction and a sidewall of the upper hole are different from each other.

Abstract: A voltage control device includes a data collector, a statistics processor, a voltage predictor, a voltage calculator, and a controller. The data collector collects voltage data from a plurality of equipment loads. The statistics processor statistically processes the voltage data collected by the data collector according to a prediction period. The voltage predictor predicts a future voltage distribution using statistical values from the statistics processor. The voltage calculator calculates a voltage to be controlled using the future voltage distribution predicted by the voltage predictor. The controller generates an instruction to perform control at the voltage calculated by the voltage calculator.

Abstract: RF transistor amplifiers include an RF transistor amplifier die having a Group III nitride-based semiconductor layer structure and a plurality of gate terminals, a plurality of drain terminals, and at least one source terminal that are each on an upper surface of the semiconductor layer structure, an interconnect structure on an upper surface of the RF transistor amplifier die, and a coupling element between the RF transistor amplifier die and the interconnect structure that electrically connects the gate terminals, the drain terminals and the source terminal to the interconnect structure.

Abstract: Proposed are a method of controlling Riptortus pedestris by enhancing a biological activity of Beauveria bassiana ARP14 and a controlling composition thereof. The control method includes co-treating Riptortus pedestris with azadirachtin and the Beauveria bassiana ARP14 strain (KCTC 12979BP). The control significantly increases the infectivity and mortality effect of the Beauveria bassiana ARP14 strain on Riptortus pedestris by enhancing the bioactivity of the Beauveria bassiana ARP14 strain through co-treatment with the Beauveria bassiana ARP14 strain and azadirachtin, especially the early infectivity and early mortality rate. The control method and composition can be widely used as safe and effective control measures against Riptortus pedestris.

Abstract: A semiconductor package includes a lead frame that includes a die pad and a first lead extending away from the die pad, a semiconductor die mounted on the die pad, a load path connection that electrically connects a first load terminal of the semiconductor die with the first lead, and a magnetic sensor arrangement mounted directly on a region of the lead frame which forms part of the load path connection, wherein the magnetic sensor arrangement comprises a magnetic current sensor that is configured to measure a current flowing through the load path connection and an electrical isolation layer that electrically isolates the magnetic current sensor from the lead frame.

Abstract: Provided is a device for visualizing a temperature and an amount of static electricity, wherein the device is arranged adjacent to a substrate processing liquid providing unit including a pipe to provide a passage through which a substrate processing liquid is transferred and a processing liquid storage module for storing the substrate processing liquid, the device including a photographing unit configured to generate a plurality of partially captured images by photographing a plurality of areas of a measurement target, a static electricity sensor configured to measure static electricity levels of the plurality of areas of the measurement target, a thermal imaging camera configured to measure temperatures of the plurality of areas of the measurement target, a processor configured to generate an entire image by combining the plurality of partially captured images with each other, and an output unit configured to output a visualization image.

Abstract: A multi-layer ceramic battery including a main region in which charging and discharging is performed, a peripheral region positioned around the main region, and a plurality of outer current collector layers disposed on a side surface of the peripheral region, wherein each outer current collector layer of the plurality of outer current collector layers is spaced apart from one other, wherein the peripheral region includes a stack, which includes at least three side surfaces, is in contact with the outer current collector layers, and is connected to the main region, and the plurality of outer current collector layers is disposed on the at least three side surfaces.

Abstract: The present invention relates to a stent catheter for stenting, which enables a stent to be easily and quickly inserted into the coronary artery of the heart even in a state where the autonomic nerve causes the heart to beat 60 to 80 times per minute, a patient breathes at a heart rate of 12 to 20 beats per minute, and a patient uncooperatively moves, wherein a subtube having a predetermined length and allowing a support wire to pass therethrough is integrally coupled to the outer peripheral surface of a maintube through which a guide wire passes, such that an outlet of the subtube is located at the boundary of a balloon provided on the maintube.

Abstract: A connector includes an inner housing, multiple terminals, and an outer housing. The inner housing has an inner housing body, and an inner partition protruding from an inner side surface of the inner housing body. Multiple terminals are inserted into the inner housing and arranged in multiple terminal spaces defined by the inner partition. Rach of the terminals includes a terminal body and a plurality of terminal arms extending from the terminal body. The outer housing is detachably connected to the inner housing and adapted to cover the multiple terminals.

Abstract: Provided are an epitaxial growth apparatus and a gas supply control module used therefor, the epitaxial growth apparatus including: a reaction chamber; a susceptor positioned in the reaction chamber and configured to seat a wafer thereon; and a gas supply control module configured to control a flow of a gas flowing into the reaction chamber, wherein the gas supply control module includes an injector including a center port corresponding to a central region of the wafer, a pair of edge ports corresponding to both edge regions of the wafer, and a pair of middle ports respectively disposed between the center port and the pair of edge ports, and a flow distribution unit configured to independently distribute the gas flow input from a source module to the ports.

Abstract: An image decoding method comprises the steps of: deriving transform coefficients through inverse quantization on the basis of quantized transform coefficients for a target block; deriving modified transform coefficients on the basis of an inverse reduced secondary transform (RST) for the transform coefficients; and generating a restoration picture on the basis of residual samples for the target block, on the basis of an inverse primary transform for the modified transform coefficients, wherein the inverse RST is performed on the basis of: transform sets determined by a mapping relation according to an intra prediction mode applied to the target block; and a transform kernel matrix selected from among two transform kernel matrices included in each of the transform sets, and is performed on the basis of: whether the inverse RST is applied; and a transform index for indicating any one of the transform kernel matrices included in the transform sets.

Abstract: Provided is a method of manufacturing a semiconductor package, the method including: providing a first semiconductor die on a stage; bonding a second semiconductor die to the first semiconductor die to each other; applying heat to a surface of the second semiconductor die, which is opposite to a bonding interface of the first semiconductor die and the second semiconductor die; and measuring a temperature change on the surface of the second semiconductor die to which the heat is applied to inspect a state of the bonding interface.

Abstract: One aspect of the present disclosure pertains to a memory device. The device includes a substrate having a first region and a second region adjacent the first region. A first SRAM cell is disposed within the first region, the first SRAM cell having first active regions extending lengthwise along a first direction on the substrate. A second SRAM cell is disposed within the second region, the second SRAM cell having second active regions extending lengthwise along the first direction on the substrate. Frontside metal lines are disposed over the first and second active regions, the frontside metal lines including a first bit line and a first bit line bar within the first region. And backside metal lines are under the first and second active regions, the backside metal lines having a second bit line and a second bit line bar within the second region.

Abstract: An apparatus for training a deep learning model for classifying emotions from biosignals includes: a memory configured to store a program for training the deep learning model; and a processor configured to train the deep learning model by executing the program, wherein, when the processor executes the program, the processor inputs an input matrix to an attention layer constituting the deep learning model, the input matrix being composed of a plurality of features each mapped to a plurality of channels and a plurality of feature groups as the biosignals are acquired from a plurality of channels and the biosignals acquired from each channel are divided into the plurality of feature groups, and the attention layer operates to mask the input matrix using an attention matrix in which an importance of features in each channel is reflected.

Abstract: Disclosed is a display device that with low power consumption. The display device includes a first thin film transistor having a polycrystalline semiconductor layer in an active area and a second thin film transistor having an oxide semiconductor layer in the active area, wherein at least one opening disposed in a bending area has the same depth as one of a plurality of contact holes disposed in the active area, whereby the opening and the contact holes are formed through the same process, and the process is therefore simplified, and wherein a high-potential supply line and a low-potential supply line are disposed so as to be spaced apart from each other in the horizontal direction, whereas a reference line and the low-potential supply line are disposed so as to overlap each other, thereby preventing signal lines from being shorted.

Abstract: A non-uniform super-resolution method, device, and recording medium of an image of the present disclosure may include an image separation unit which separates an input image into a high-quality region and a low-quality region based on a quality map image, an image quality conversion unit which acquires a converted high-quality region by converting image quality of the high-quality region, and a first image combination unit which combines the converted high-quality region and the low-quality region to transmit them to a super-resolution network.

Abstract: The present disclosure relates to a 5th generation (5G) or 6th generation (6G) communication system for supporting a higher data rate. A method performed by a user equipment (UE) in a wireless communication system is provided. The method may include: receiving, from a base station (BS), a radio resource control (RRC) message including a parameter associated with using a start symbol of a physical downlink control channel (PDCCH) monitoring occasion as a reference of a start and length identifier value (SLIV); determining, based on the parameter, when a physical downlink shared channel (PDSCH) is scheduled by downlink control information (DCI) transmitted via repetitive first PDCCH candidate and second PDCCH candidate, a reference symbol associated with a start symbol of the PDSCH by using the second PDCCH candidate starting after the first PDCCH candidate; and receiving, based on the reference symbol, downlink data via the PDSCH from the BS.

Abstract: A data driving circuit includes: a reference voltage generator that receives a data control signal and generates a gamma reference voltage and a test reference voltage, a data driving unit that outputs a data signal for a pixel based on the gamma reference voltage, and an output circuit that outputs a test data voltage for a dummy pixel based on the test reference voltage.

Abstract: An image decoding method according to the present disclosure may comprise: a step of parsing an LFNST index on the basis of individual transform skip flag values for color components of a current block; a step of deriving modified transform coefficients by applying LFNST to transform coefficients; and a step of deriving residual samples with respect to a target block on the basis of an inverse primary transform of the modified transform coefficients.