Patents by Inventor In Mook Kim

In Mook Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11778639
    Abstract: Disclosed herein are a method and apparatus of broadcast gateway signaling for channel bonding. The apparatus for broadcast gateway signaling includes an input formatting unit configured to generate baseband packets corresponding to channel bonding; and a stream partitioner configured to allocate the baseband packets to two or more RF channels of the channel bonding for generating an outer tunnel data stream, the outer tunnel data stream generated in different ways according to a plurality of operation modes for the channel bonding.
    Type: Grant
    Filed: September 16, 2021
    Date of Patent: October 3, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Jae-Young Lee, Soon-Choul Kim, Sung-Ik Park, Heung-Mook Kim
  • Patent number: 11778076
    Abstract: An apparatus and method for broadcast signal frame using layered division multiplexing are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information shared by the core layer signal and the enhanced layer signal, using the time-interleaved signal.
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: October 3, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Young Lee, Heung-Mook Kim, Sung-Ik Park, Sun-Hyoung Kwon
  • Patent number: 11770136
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 4096-symbol mapping.
    Type: Grant
    Filed: August 2, 2021
    Date of Patent: September 26, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Publication number: 20230299789
    Abstract: A zero padding apparatus and method for variable length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.
    Type: Application
    Filed: May 30, 2023
    Publication date: September 21, 2023
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM
  • Patent number: 11764808
    Abstract: A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 4/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.
    Type: Grant
    Filed: January 17, 2022
    Date of Patent: September 19, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Publication number: 20230291672
    Abstract: A data transmission circuit may include a plurality of data transmission lines configured to transmit a victim data signal through a victim data transmission line, and transmit an adjacent data signal through an adjacent data transmission line disposed adjacent to the victim data transmission line; and a data input/output circuit configured to control a reference voltage level reflected into the victim data signal on the basis of data pattern information of the adjacent data signal, and compare the victim data signal to the reference voltage level and output the comparison result.
    Type: Application
    Filed: October 3, 2022
    Publication date: September 14, 2023
    Inventors: In Seok KONG, Ki Yong Choi, Dong Seok Kim, Sung Mook Kim, Se Won Kim, Joo Won Oh, Keun Jin Chang
  • Publication number: 20230290399
    Abstract: A semiconductor memory device includes a refresh counter generating a counting address that is sequentially increasing according to a refresh command; an active latch generating an active address corresponding to an input address according to an active command; and a refresh control circuit repeatedly performing a first refresh period and a second refresh period according to the refresh command, and controlling selective refresh of one or more word lines corresponding to the counting address selected based on one or more high bits of the active address during the first refresh period and controlling sequential refresh of the word lines corresponding to the counting address during the second refresh period.
    Type: Application
    Filed: July 22, 2022
    Publication date: September 14, 2023
    Inventor: Kyung Mook KIM
  • Patent number: 11757689
    Abstract: An apparatus and method for generating broadcast signal frame using layered division multiplexing are disclosed. The apparatus includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal at different power levels; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
    Type: Grant
    Filed: May 17, 2022
    Date of Patent: September 12, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Jae-Young Lee, Sung-Ik Park, Sun-Hyoung Kwon, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 11753759
    Abstract: Provided is a washing machine including a main body having an opening and a door assembly disposed at the opening, wherein the door assembly includes a door that opens and closes the opening and an auxiliary washing unit having an auxiliary washing space in which hand-washing can be performed, and provided to pivot about one side of the door in an inside of the door. Through this configuration, separated washing spaces can be provided and separate hand-washing can be performed. Also, pressure of washing water supplied into the washing machine can be regulated so that water supply efficiency can be improved and a flow rate of the washing water can be adjusted.
    Type: Grant
    Filed: October 14, 2020
    Date of Patent: September 12, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Min Hyung Kim, Hyun Mook Kim, Yong Kwon Won, Masato Suzuki, Mitsuhiro Shigeri, Young Sun Shin, Goan Su Jung, Amitoj Singh, Gyu Woo Kim
  • Patent number: 11746258
    Abstract: A CMP slurry composition for copper films and a method of polishing a copper film using the same are disclosed, the composition including a polar solvent or a non-polar solvent; and polishing particles modified with a silicon-containing compound, wherein the silicon-containing compound is represented by Formula 1,
    Type: Grant
    Filed: October 16, 2020
    Date of Patent: September 5, 2023
    Assignee: SAMSUNG SDI CO., LTD.
    Inventors: Hyeong Mook Kim, Keun Sam Jang, Dong Hun Kang, Jong Won Lee
  • Patent number: 11750224
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 3/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: September 5, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 11750225
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 2/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 256-symbol mapping.
    Type: Grant
    Filed: February 16, 2021
    Date of Patent: September 5, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Heung-Mook Kim, Jae-Young Lee, Nam-Ho Hur
  • Publication number: 20230275600
    Abstract: A parity interleaving apparatus and method for variable length signaling information are disclosed. A parity interleaving apparatus according to an embodiment of the present invention includes a processor configured to generate a parity bit string for parity puncturing by segmenting parity bits of an LDPC codeword whose length is 16200 and whose code rate is 3/15, into a plurality of groups, and group-wise interleaving the groups using an order of group-wise interleaving; and memory configured to provide the parity bit string for parity puncturing to a parity puncturing unit.
    Type: Application
    Filed: May 10, 2023
    Publication date: August 31, 2023
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM
  • Publication number: 20230268935
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 64800 and a code rate of 7/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for quadrature phase shift keying (QPSK) modulation.
    Type: Application
    Filed: April 28, 2023
    Publication date: August 24, 2023
    Inventors: Sung-Ik PARK, Sun-Hyoung KWON, Jae-Young LEE, Heung-Mook KIM, Nam-Ho HUR
  • Patent number: 11736123
    Abstract: A zero padding apparatus and method for fixed length signaling information are disclosed. A zero padding apparatus according to an embodiment of the present invention includes a processor configured to generate a LDPC information bit string by deciding a number of groups whose all bits are to be filled with 0 using a difference between a length of the LDPC information bit string and a length of a BCH-encoded bit string, selecting the groups using a shortening pattern order to fill all the bits of the groups with 0, and filling at least a part of remaining groups, which are not filled with 0, with the BCH-encoded bit string; and memory configured to provide the LDPC information bit string to an LDPC encoder.
    Type: Grant
    Filed: August 19, 2022
    Date of Patent: August 22, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim
  • Patent number: 11722244
    Abstract: An apparatus and method for generating a broadcast signal frame corresponding to a time interleaver supporting a plurality of operation modes are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a combiner configured to generate a multiplexed signal by combining a core layer signal and an enhanced layer signal; a power normalizer configured to reduce the power of the multiplexed signal to a power level corresponding to the core layer signal; a time interleaver configured to generate a time-interleaved signal by performing interleaving that is applied to both the core layer signal and the enhanced layer signal; and a frame builder configured to generate a broadcast signal frame including a preamble for signaling time interleaver information corresponding to the time interleaver, the preamble includes a field indicating a start position of a first complete FEC block corresponding to each of physical layer pipes.
    Type: Grant
    Filed: April 6, 2022
    Date of Patent: August 8, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sun-Hyoung Kwon, Sung-Ik Park, Jae-Young Lee, Bo-Mi Lim, Heung-Mook Kim, Nam-Ho Hur
  • Patent number: 11722155
    Abstract: A bit interleaver, a bit-interleaved coded modulation (BICM) device and a bit interleaving method are disclosed herein. The bit interleaver includes a first memory, a processor, and a second memory. The first memory stores a low-density parity check (LDPC) codeword having a length of 16200 and a code rate of 4/15. The processor generates an interleaved codeword by interleaving the LDPC codeword on a bit group basis. The size of the bit group corresponds to a parallel factor of the LDPC codeword. The second memory provides the interleaved codeword to a modulator for 16-symbol mapping.
    Type: Grant
    Filed: February 2, 2021
    Date of Patent: August 8, 2023
    Assignee: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Bo-Mi Lim, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur
  • Publication number: 20230246897
    Abstract: An apparatus and method for broadcast signal frame using a bootstrap and a preamble are disclosed. An apparatus for generating broadcast signal frame according to an embodiment of the present invention includes a time interleaver configured to generate a time-interleaved signal by performing interleaving on a BICM output signal; and a frame builder configured to generate a broadcast signal frame including a bootstrap and a preamble using the time-interleaved signal.
    Type: Application
    Filed: April 11, 2023
    Publication date: August 3, 2023
    Applicant: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik PARK, Jae-Young LEE, Sun-Hyoung KWON, Heung-Mook KIM
  • Publication number: 20230245989
    Abstract: A printed circuit board includes: a first insulating layer; a first cavity disposed in one surface of the first insulating layer; a plurality of protrusion portions spaced apart from each other in the first cavity; and a first wiring layer embedded in the one surface of the first insulating layer.
    Type: Application
    Filed: April 7, 2023
    Publication date: August 3, 2023
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Young Kuk Ko, Sang Hoon Kim, Suk Chang Hong, Chi Won Hwang, Gyu Mook Kim
  • Patent number: 11711156
    Abstract: An apparatus for transmitting broadcasting signal using transmitter identification scaled by 4-bit injection level code and method using the same are disclosed. An apparatus for transmitting broadcasting signal according to an embodiment of the present invention includes a waveform generator configured to generate a host broadcasting signal; a transmitter identification signal generator configured to generate a transmitter identification signal for identifying a transmitter, the transmitter identification signal scaled by an injection level code; and a combiner configured to inject the transmitter identification signal into the host broadcasting signal in a time domain so that the transmitter identification signal is transmitted synchronously with the host broadcasting signal.
    Type: Grant
    Filed: March 22, 2022
    Date of Patent: July 25, 2023
    Assignee: Electronics and Telecommunications Research Institute
    Inventors: Sung-Ik Park, Sun-Hyoung Kwon, Jae-Young Lee, Heung-Mook Kim, Nam-Ho Hur