Patents by Inventor In-sang Jeom

In-sang Jeom has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7910421
    Abstract: Provided is a method of manufacturing a semiconductor device, in which the thickness of a gate insulating layer of a CMOS device can be controlled. The method can include selectively injecting fluorine (F) into a first region on a substrate and avoiding injecting the fluorine (F) into a second region on the substrate. A first gate insulating layer is formed of oxynitride layers on the first and second regions to have first and second thicknesses, respectively, where the first thickness is less than the second thickness. A second gate insulating layer is formed on the first gate insulating layer and a gate electrode pattern is formed on the second gate insulating layer.
    Type: Grant
    Filed: May 30, 2008
    Date of Patent: March 22, 2011
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-jin Hyun, Si-young Choi, In-sang Jeom, Gab-jin Nam, Sang-bom Kang, Sug-hun Hong
  • Publication number: 20090154448
    Abstract: Disclosed is a transmitting and receiving apparatus and method in a communication system. The transmitting and receiving apparatus and method can provide a data service for exchanging user data including characters, images, computer files, messages, etc. as well as voice over a voice physical channel for providing a voice service in a wireless communication system including IS-95A/B, CDMA 1x, GSM and W-CDMA and in a communication system including a voice service for providing a VoIP service through a wired/wireless packet network. That is, the transmitting and receiving apparatus and method can provide a data service which transfers user data information while a voice service is provided or plays a game etc. during a call.
    Type: Application
    Filed: October 20, 2005
    Publication date: June 18, 2009
    Applicant: MIRACOM TECHNOLOGY CO., LTD
    Inventors: Seung-Hwan Lee, Won-Jae Cha, Sang-Jeom Lee
  • Publication number: 20080305620
    Abstract: Provided is a method of manufacturing a semiconductor device, in which the thickness of a gate insulating layer of a CMOS device can be controlled. The method can include selectively injecting fluorine (F) into a first region on a substrate and avoiding injecting the fluorine (F) into a second region on the substrate. A first gate insulating layer is formed of oxynitride layers on the first and second regions to have first and second thicknesses, respectively, where the first thickness is less than the second thickness. A second gate insulating layer is formed on the first gate insulating layer and a gate electrode pattern is formed on the second gate insulating layer.
    Type: Application
    Filed: May 30, 2008
    Publication date: December 11, 2008
    Inventors: Sang-jin Hyun, Si-young Choi, In-sang Jeom, Gab-jin Nam, Sang-bom Kang, Sug-hun Hong