Abstract: A memory device includes a plurality of first cell blocks configured to store first data; a second cell block configured to store second data; a third cell block configured to store third data; a repair information storage circuit configured to output, based on repair information stored therein, a repair use signal corresponding to an input address; and an error correction circuit configured to: receive the second data as a first error correction code from the second cell block while selectively receiving, according to the repair use signal, the third data as a second error correction code from the third cell block, and correct errors in the first data from the first cell blocks using the first and second error correction codes.

Abstract: A processing tape may include a base layer, an adhesive layer disposed on the base layer, a protection release film on the adhesive layer, and a first release layer interposed between the adhesive layer and the protection release film. The first release layer may include a silicone-based material and may be non-photo-curable.

Abstract: A method for determining heat and reflected heat in a thermal image, according to the present invention, comprises the steps of: a) photographing a subject through a thermal imaging camera so as to collect a thermal image of the subject; b) analyzing features according to the thermal image temperature distribution of the thermal image; c) detecting the heat and the reflected heat in the thermal image according to the analysis in step b); and d) displaying, as heat and reflected heat regions in the thermal image, the heat and the reflected heat in the thermal image detected in step c).

Abstract: A method for operating a performance optimization device of memory system is provided, the method including determining N, where N is a natural number greater than 0, candidate performance parameter values for a performance parameter of the memory system; calculating N objective function results for an objective function defined for the memory system; and determining an additional candidate performance parameter value for the performance parameter of the memory system, based on the N candidate performance parameter values and the N objective function results.

Abstract: A semiconductor device may include an active pattern on a substrate, a source/drain pattern on the active pattern, a channel pattern connected to the source/drain pattern, a gate electrode on the channel pattern, an active contact on the source/drain pattern, a first lower interconnection line on the gate electrode, and a second lower interconnection line on the active contact and at the same level as the first lower interconnection line. The gate electrode may include an electrode body portion and an electrode protruding portion, wherein the electrode protruding portion protrudes from a top surface of the electrode body portion and is in contact with the first lower interconnection line thereon. The active contact may include a contact body portion and a contact protruding portion, wherein the contact protruding portion protrudes from a top surface of the contact body portion and is in contact with the second lower interconnection line thereon.

Abstract: A button-type secondary battery may include an electrode assembly in which electrodes and separators are wound, a can body housing the electrode assembly, a base plate in which a through-hole is defined and which covers an opening of an upper end of the can body and is bonded to the can body, an electrode terminal of which at least a portion is inserted into the through-hole of the base plate and which covers the through-hole, an insulating gasket configured to insulate the electrode terminal and the base plate from each other, and an insulating sheet disposed on a bottom surface of the base plate to insulate the bottom surface of the base plate, wherein a central hole is defined at a winding center of the electrode assembly, and a protrusion protruding in a direction toward the central hole is disposed on a bottom surface of the electrode terminal.

Abstract: In some embodiments of the disclosed technology, a memory controller may include a data strobe signal (DQS) calibration circuit configured to calibrate timing of a data strobe signal (DQS) for a plurality of memory dies by performing N unit DQS calibration operations, wherein N is a natural number, wherein performing the N unit DQS calibration operations includes: performing M unit DQS calibration operations in a normal mode on the plurality of memory dies, wherein M is a natural number smaller than N; upon failure of calibration during the M unit DQS calibration operations in the normal mode, determining a representative memory die of the plurality of memory dies that causes the failure of calibration; and performing N?M unit DQS calibration operations in a conditional mode on the plurality of memory dies by varying parameters associated with the representative memory die of the plurality of memory dies.

Abstract: The present invention relates to a dehumidification liquid regeneration apparatus for regenerating a dehumidification liquid, which is used to dehumidify air in a liquid dehumidification system and thus the concentration thereof is decreased, into a dehumidification liquid whose concentration is suitable for dehumidification and includes a regeneration tank in which a dehumidification liquid used for dehumidification treatment is stored, a vacuum pump connected to the regeneration tank, and a water vapor recovery module provided between the regeneration tank and the vacuum pump. The water vapor recovery module includes a water vapor recovery chamber and an exhaust air chamber configured to store and discharge air from which moisture is removed, and thus an internal pressure of the regeneration tank can be decreased to quickly and efficiently regenerate the dehumidification liquid, and damage to the vacuum pump due to moisture can be prevented.

Abstract: The catalyst for methane reformation according to an exemplary embodiment of the present application comprises: a porous metal support; a first coating layer provided on the porous metal support and comprising an inorganic oxide; and a second coating layer provided on the first coating layer and comprising the perovskite-based compound represented by Chemical Formula 2: Sr1-xAxTi?ByO3-???[Chemical Formula 2] wherein all the variables are described herein.

Abstract: A display device includes a display panel including a display area, a pad area spaced apart from the display area, and a bending area adjacent to the display area in a first direction, disposed between the display area and the pad area, and bent from the display area, a window member disposed on a first surface of the display panel, and a spacer disposed on a second surface of the display panel opposite to the first surface and overlapping the display area and the pad area. A first opening pattern is defined at an end portion of the spacer.

Abstract: This invention relates to compounds which are microtubule associated serine/threonine-like kinase (MASTL) inhibitors and the use of the compounds in the treatment of diseases and medical conditions mediated by MASTL, for example in the treatment of cancer and other target related diseases.

Abstract: The present invention relates to: a deoxycholic acid-peptide conjugate having anti-obesity activity by inhibiting lipid production and promoting lipolysis; and a use for preventing, ameliorating or treating obesity comprising the conjugate as an active ingredient.

Abstract: A semiconductor device comprises a substrate; an element isolation film that defines a first active region in the substrate; a first gate electrode on the first active region; a first source/drain region located inside the first active region between the element isolation film and the first gate electrode; and an isolation contact that extends in a vertical direction intersecting an upper face of the substrate, in the element isolation film. The isolation contact is configured to have a voltage applied thereto.

Abstract: A polarizing plate and an optical display apparatus are disclosed. A polarizing plate includes a polarizer and a stack of retardation layers on a surface of the polarizer, and the stack of retardation layers includes a second retardation layer and a first retardation layer stacked on the polarizer in sequence from the surface of the polarizer, the second retardation layer being a non-liquid crystal layer, and the stack of retardation layers has an out-of-plane retardation of ?40 nm or more to less than 0 nm at a wavelength of 550 nm and satisfies Relation 1.

Abstract: The present disclosure relates to an upstream of mTORC2 (UT2) gene-deficient mouse model and a method of screening therapeutic agents for myeloid leukemia using the same, wherein it was found that the onset of myeloid leukemia and proliferation of myeloid leukemia cells were more facilitated in UT2 gene-deficient mice and UT2 genetic scissor (Cripsr/Cas9)-deficient myeloid leukemia cell lines. In addition, it was found that the survival rate of patients with low expression of UT2 was low in myeloid leukemia patients, while expression of UT2 was low in cells of actual myeloid leukemia patients.

Abstract: The present disclosure relates to an organic electroluminescent compound, and an organic electroluminescent device comprising the same. It is possible to provide an organic electroluminescent device which can be deposited at a low deposition temperature and/or in which clogging is reduced.

Abstract: A washing machine is provided. The washing machine includes a water tub configured to be disposed in a cabinet and to store wash water, a rotating tub configured to be rotatably installed in the water tub and to include an opening formed in an upper end portion thereof, and a driver configured to be connected to the rotating tub and to rotate the rotating tub, wherein a deviation preventer configured to prevent wash water in the rotating tub from being deviated to one side during rotation of the rotating tub is formed at an upper end portion of the rotating tub.

Abstract: A memory system may wait to receive one or more read commands from a reference time point, and read data, requested by the one or more read commands, from the memory device in response to a determination that it is possible to simultaneously read data divided and stored, as an M number of data units, in an M number of planes among a plurality of planes in response to the one or more read commands or that a maximum read wait time has elapsed from the reference time point, M being a natural number.

Abstract: A display device includes: a substrate; and a semiconductor layer including a driving transistor and a fourth transistor on the substrate, wherein a first electrode of the driving transistor is connected to a driving voltage line to receive a driving voltage, a first electrode of the fourth transistor is connected to a first initialization voltage line to receive a first initialization voltage, a second electrode of the fourth transistor is connected to a gate electrode of the driving transistor, a low doping region is between a channel of the fourth transistor and the first electrode of the fourth transistor, and a low doping region is not between the channel of the further transistor and the second electrode of the fourth transistor.