Patents by Inventor In Seong Hwang

In Seong Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11967276
    Abstract: A display device includes: a display panel including a first pixel, a second pixel adjacent to one side of the first pixel, and a third pixel adjacent to the other side of the first pixel; a first scan driver supplying a first signal to the first to third pixels through a first scan line; a second scan driver supplying a second scan signal to the second and third pixels through a second scan line when a first time elapses after the supply of the first scan signal is started; a data driver supplying a data voltage to a plurality of output lines; and a data divider selectively supplying the data voltage to data lines respectively coupled to the first to third pixels. Each of the second and third pixels includes a switching transistor controlled by the second scan signal.
    Type: Grant
    Filed: April 7, 2021
    Date of Patent: April 23, 2024
    Assignee: Samsung Display Co., Ltd.
    Inventors: Young In Hwang, Elly Gil, Jin A Lee, Joo Hyeon Jo, Seong Baik Chu
  • Publication number: 20240130171
    Abstract: A display may include flexible substrate, a blocking layer on the flexible substrate, a pixel on the flexible substrate and the blocking layer, and a scan line, a data line, a driving voltage line, and an initialization voltage line connected to the pixel. The pixel may include an organic light emitting diode, a switching transistor connected to the scan line, and a driving transistor to apply a current to the organic light emitting diode. The blocking layer is in an area that overlaps the switching transistor on a plane, and between the switching transistor and the flexible substrate, and receives a voltage through a contact hole that exposes the blocking layer.
    Type: Application
    Filed: December 8, 2023
    Publication date: April 18, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: Seong Min WANG, Young-In HWANG, Yong Ho YANG, Yong Su LEE, Jae Seob LEE, Gyoo Chul JO
  • Patent number: 11953596
    Abstract: A light detection and ranging (lidar) device includes: a lower base; an upper base; a laser emitting unit for emitting a laser in a form of a point light source; a nodding mirror for transforming the laser in the form of the point light source to a line beam pattern which is perpendicular to the lower base, wherein the nodding mirror reflects the laser emitted from the laser emitting unit; a polygonal mirror for transforming the line beam pattern to a plane beam pattern and receiving a laser reflected from an object; and a sensor unit for receiving the laser reflected from the object via the polygonal mirror.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: April 9, 2024
    Assignee: SOS Lab Co., Ltd.
    Inventors: Ji Seong Jeong, Jun Hwan Jang, Dong Kyu Kim, Sung Ui Hwang, Gyeong Hwan Shin, Bum Sik Won
  • Patent number: 11953626
    Abstract: The present invention relates to a light detecting and ranging (LiDAR) device for obtaining information on a distance from an object using laser light.
    Type: Grant
    Filed: January 4, 2019
    Date of Patent: April 9, 2024
    Assignee: SOS Lab Co., Ltd
    Inventors: Ji Seong Jeong, Jun Hwan Jang, Dong Kyu Kim, Sung Hi Hwang
  • Publication number: 20240105963
    Abstract: A method for manufacturing a gas diffusion layer for a fuel cell wherein carbon nanotubes are impregnated into Korean paper, thereby enhancing electroconductivity, and a gas diffusion layer manufactured thereby. The method for manufacturing a gas diffusion layer for a fuel cell which is to manufacture a gas diffusion layer as a constituent member of a unit cell in a fuel cell, includes a support preparation step of preparing a support with Korean paper; a dispersion preparation step of dispersing a carbon substance in a solvent to form a dispersion, a coating step of coating the support with the dispersion, and a thermal treatment step of thermally treating the dispersion-coated support to fix the carbon substance to the support.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 28, 2024
    Inventors: Seung Tak Noh, Ji Han Lee, In Seok Lee, Jae Man Park, Won Jong Choi, Choong Hee Kim, Seong Hwang Kim, Jong Hoon Lee, Soo Jin Park, Seul Yi Lee
  • Publication number: 20240103362
    Abstract: Disclosed herein is a method of printing a nanostructure including: preparing a template substrate on which a pattern is formed; forming a replica pattern having an inverse phase of the pattern by coating a polymer thin film on an upper portion of the template substrate, adhering a thermal release tape to an upper portion of the polymer thin film, and separating the polymer thin film from the template substrate; forming a nanostructure by depositing a functional material on the replica pattern; and printing the nanostructure deposited on the replica pattern to a substrate by positioning the nanostructure on the substrate, applying heat and pressure to the nanostructure, and weakening an adhesive force between the thermal release tape and the replica pattern by the heat.
    Type: Application
    Filed: September 19, 2023
    Publication date: March 28, 2024
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Jong Min KIM, Seung Yong LEE, So Hye CHO, Ho Seong JANG, Jae Won CHOI, Chang Kyu HWANG
  • Publication number: 20240088059
    Abstract: An electronic device structure having a shielding structure includes a substrate with an electronic component electrically connected to the substrate. The shielding structure includes conductive spaced-apart pillar structures that have proximate ends connected to the substrate and distal ends spaced apart from the substrate, and that are laterally spaced apart from the first electronic component. In one embodiment, the conductive pillar structures are conductive wires attached at one end to the substrate with an opposing end extending away from the substrate so that the conductive wires are provided generally perpendicular to the substrate. A package body encapsulates the electronic component and the conductive spaced-apart pillar structures. In one embodiment, the shielding structure further includes a shielding layer disposed adjacent to the package body, which is electrically connected to the conductive spaced-apart pillar structures.
    Type: Application
    Filed: November 17, 2023
    Publication date: March 14, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd.
    Inventors: Young Woo LEE, Jae Ung LEE, Byong Jin KIM, EunNaRa CHO, Ji Hoon OH, Young Seok KIM, Jin Young KHIM, Tae Kyeong HWANG, Jin Seong KIM, Gi Jung KIM
  • Publication number: 20230109869
    Abstract: Provided are compositions for preventing or treating cancer including Asarum maculatum Nakai extracts, or a fraction thereof. According to an aspect, an Asarum maculatum Nakai extract has an excellent anticancer efficacy against various cancers including diffuse-type gastric cancer, and a cancer treatment agent having an excellent effect may be developed by using the extract as an active ingredient.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 13, 2023
    Applicants: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hak Cheol KWON, Jaeyoung KWON, Seong-Hwan KIM, Jung Hwan LEE, Jin Wook CHA, Ho Seong HWANG, Won Kyu KIM, Yujin KWON, Suyeon CHO, Taek Joo LEE, Jung Hwa KANG, Wan Hee LEE, Hyunki KIM
  • Patent number: 11574677
    Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 7, 2023
    Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
    Inventors: Jungho Yoon, Cheol Seong Hwang, Soichiro Mizusaki, Youngjin Cho
  • Publication number: 20220336574
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang Yeol KANG, Kyu Ho CHO, Han Jin LIM, Cheol Seong HWANG
  • Patent number: 11411069
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: August 9, 2022
    Assignees: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Sang Yeol Kang, Kyu Ho Cho, Han Jin Lim, Cheol Seong Hwang
  • Publication number: 20210393723
    Abstract: Provided are methods of reducing and killing bacteria and fungi, and photodynamic treatment methods and sterilization methods using the methods of reducing and killing bacteria and fungi. The method of reducing and killing bacteria and fungi includes bringing a composition including a Ligularia fischeri extract or a fraction thereof as an active ingredient into contact with cells or tissues of a subject and irradiating cells or tissues of a subject in contact with the composition with an absorbable wavelength of excitation light.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 23, 2021
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Kyungsu KANG, Jae Young KWON, Hak Cheol KWON, Jin Chul KIM, Jin Soo PARK, Ho Seong HWANG, Seemi Tasnim ALAM
  • Publication number: 20210384258
    Abstract: The present invention relates to a three-dimensional resistive switching memory device including a plurality of memory cells. A three-dimensional resistive switching memory device according to an embodiment comprises a plurality of memory cells. Each memory cell comprises, a semiconductor channel layer comprising a metal oxide extended in a vertical direction on the substrate; a variable resistance layer contacting one side of the semiconductor channel layer and extended in the vertical direction; and a plurality of gate structures having a gate electrode disposed on the other side opposite to the one side of the semiconductor channel layer and defining the plurality of memory cells serially connected to each other along the vertical direction, and a gate insulating film arranged between the gate electrode and the semiconductor channel layer.
    Type: Application
    Filed: June 4, 2020
    Publication date: December 9, 2021
    Applicant: Seoul National University R&DB Foundation
    Inventor: Cheol Seong Hwang
  • Publication number: 20210359205
    Abstract: Disclosed is a method of forming a chalcogenide-based thin film using an atomic layer deposition (ALD) process including forming a Ge—Te-based material, the forming of the Ge—Te-based material may include a first operation of supplying, into a reaction chamber provided with a substrate, a first source gas including a Ge precursor with Ge having an oxidation state of +2, a second operation of supplying a first purge gas into the reaction chamber, a third operation of supplying, into the reaction chamber, a second source gas including a Te precursor and a first co-reactant gas for promoting a reaction between the Ge precursor and the Te precursor, and a fourth operation of supplying a second purge gas into the reaction chamber.
    Type: Application
    Filed: May 17, 2021
    Publication date: November 18, 2021
    Inventor: Cheol Seong Hwang
  • Publication number: 20210350851
    Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
    Type: Application
    Filed: July 26, 2021
    Publication date: November 11, 2021
    Applicants: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Jungho YOON, Cheol Seong HWANG, Soichiro MIZUSAKI, Youngjin CHO
  • Patent number: 11087839
    Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
    Type: Grant
    Filed: February 27, 2020
    Date of Patent: August 10, 2021
    Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
    Inventors: Jungho Yoon, Cheol Seong Hwang, Soichiro Mizusaki, Youngjin Cho
  • Patent number: 10983348
    Abstract: A head mount wearable device is provided. The housing includes a first surface and a second surface, in which the first surface faces the face of a user and the second surface is opposite to the first surface when a user wears the head mount wearable device, a pair of lenses disposed inside at least one opening formed through the housing from the first surface to the second surface, at least one mounting member connected to the housing and configured to be worn by a user where the pair of lenses are positioned in front of the eyes of a user, and a holder assembly formed on the second surface or close to the second surface to hold a mobile device including a display and holding the mobile device where the display of the mobile device faces the opening.
    Type: Grant
    Filed: July 18, 2018
    Date of Patent: April 20, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Ji-Seong Hwang, Chung-Keun Yoo, Kyu-Myeong Kang, Kyeong-Soo Kim, Jae-Cheon Kim, Suk-Jin Yun
  • Publication number: 20210020735
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Application
    Filed: September 24, 2020
    Publication date: January 21, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang Yeol KANG, Kyu Ho CHO, Han Jin LIM, Cheol Seong HWANG
  • Patent number: D1025167
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 30, 2024
    Inventors: Han Wool Choi, Jun Hwan Park, Seok Young Youn, Hun Keon Ko, Ho Seong Kang, Hyeon Jeong An, Gyu Jong Hwang, Soo Kyoung Kang, Dong Jin Hyun, Geun Sang Yu
  • Patent number: D1025168
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 30, 2024
    Inventors: Han Wool Choi, Jun Hwan Park, Seok Young Youn, Hun Keon Ko, Ho Seong Kang, Hyeon Jeong An, Gyu Jong Hwang, Soo Kyoung Kang, Dong Jin Hyun, Geun Sang Yu