Patents by Inventor In Seong Hwang

In Seong Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250089231
    Abstract: The present disclosure discloses a vertical stack-type memory device may including a word line extending in a horizontal direction and having a vertical through-hole region, a vertical bit line arranged vertically to pass through the through-hole region, a channel layer pattern arranged to surround the vertical bit line inside the through-hole region, a body insulating layer disposed between the vertical bit line and a remaining portion except for the one end of the channel layer pattern, an electrode member arranged to surround an outer peripheral surface of the channel layer pattern at a height higher than the word line, a dielectric layer pattern disposed between the word line and the channel layer pattern and having a structure surrounding the electrode member, and a plate electrode in contact with the dielectric layer pattern above the word line.
    Type: Application
    Filed: October 17, 2023
    Publication date: March 13, 2025
    Inventor: Cheol Seong Hwang
  • Publication number: 20250089242
    Abstract: The present disclosure discloses a manufacturing method of a memory device including forming a structure including an epitaxial material plug extending in a vertical direction on a substrate, an epitaxial channel material layer extending in a horizontal direction from a side surface of the epitaxial material plug, and a gate insulating material layer formed on at least a surface portion of the epitaxial channel material layer.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 13, 2025
    Inventor: Cheol Seong Hwang
  • Publication number: 20250083577
    Abstract: A walk-in device for a vehicle seat includes a rear link having one end connected to a seat cushion frame by a first hinge shaft, and the other end connected to an upper rail by a second hinge shaft, and a pressing bracket configured to be pressed by the rear link.
    Type: Application
    Filed: August 29, 2024
    Publication date: March 13, 2025
    Inventors: Gwon Hwa BOK, Hwa Young MUN, Seong Jun SHIN, Cheolhwan YOON, Han Yun CHOI, Junsik HWANG
  • Publication number: 20250089238
    Abstract: The present disclosure discloses a manufacturing method including forming a stack including a first insulating layer, and a first sacrificial layer and a second insulating layer which are sequentially stacked on the first insulating layer; forming a patterned stack including at least one pattern portion having a first sacrificial layer obtained from the first sacrificial layer by patterning the stack; forming a structure including the patterned stack and the insulating material by filling empty spaces on both sides of the at least one pattern portion with an insulating material; forming a first vertical hole penetrating through the first sacrificial layer pattern of the pattern portion in the structure; forming a horizontal hole by removing the first sacrificial layer pattern exposed by the first vertical hole; and forming a gate insulating material layer on inner surfaces of the first vertical hole and the horizontal hole.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 13, 2025
    Inventor: Cheol Seong Hwang
  • Publication number: 20250089232
    Abstract: The present disclosure discloses a manufacturing method of a memory device including forming a structure including an epitaxial material plug extending vertically on a substrate, an epitaxial material layer extending horizontally from a side surface of the epitaxial material plug, and a gate insulating material layer formed at least on a surface of the epitaxial material layer, defining a transistor including a word line by forming the word line in contact with the gate insulating material layer in a transistor formation region around the epitaxial material plug in the structure, removing the epitaxial material layer and the gate insulating material layer from a capacitor formation region adjacent to the transistor formation region of the structure, and forming a capacitor connected to one end of the epitaxial material layer corresponding to a channel of the transistor.
    Type: Application
    Filed: November 7, 2023
    Publication date: March 13, 2025
    Inventor: Cheol Seong Hwang
  • Patent number: 12249284
    Abstract: Provided are a pixel circuit and a display device having the pixel circuit. The pixel circuit includes an organic light emitting diode, a switching transistor, a storage capacitor, and a driving transistor. The switching transistor is turned off when a scan signal has a first voltage and turned on when the scan signal has a second voltage. The storage capacitor stores a data voltage when the switching transistor is turned on in response to the scan signal. The driving transistor is electrically connected with the organic light emitting diode between a high power supply voltage and a low power supply voltage to provide a driving current to the organic light emitting diode, and includes a first bottom gate electrode that is provided with the first voltage. The driving current corresponds to the data voltage stored in the storage capacitor.
    Type: Grant
    Filed: September 22, 2020
    Date of Patent: March 11, 2025
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Jung-Mi Choi, Young-In Hwang, Eung Taek Kim, Yong Ho Yang, Joo Hyeon Jo, Seong Baik Chu
  • Publication number: 20250079461
    Abstract: The present invention relates to a transparent anode active material having excellent light transmittance and electrical conductivity characteristics and a manufacturing method thereof, and a lithium ion battery and an all-solid-state lithium thin-film battery based on the same and having excellent charge/discharge capacity and charge/discharge rate, wherein the transparent anode active material according to the present invention is characterized by comprising a material of the following Chemical Formula 1: AgxSiOyN wherein x is 0<x?0.8 and y is 0<y?1.
    Type: Application
    Filed: August 27, 2024
    Publication date: March 6, 2025
    Inventors: Ji-Won CHOI, Haena YIM, Yaelim HWANG, Chong Yun KANG, Seung Hyub BAEK, Seong Keun KIM, Hyun-Cheol SONG, Jungho YOON, Ji-Soo JANG, Sunghoon HUR
  • Patent number: 12229371
    Abstract: A method and a device for detecting the position of an object are disclosed. According to an embodiment of the present disclosure, the method for detecting the position of an object includes: detecting a position of the object in a sensing zone, which is divided into multiple divided sensing zones along one direction, by causing multiple light-emitting elements disposed along the one direction to emit light sequentially along the one direction and measuring an intensity and a reception time point of a reflected signal by using a light-receiving element; and reflecting and displaying the detected position of the object on a display screen.
    Type: Grant
    Filed: November 22, 2023
    Date of Patent: February 18, 2025
    Assignee: HYUNDAI MOBIS CO., LTD.
    Inventors: Sung Hyun Park, Jun Seong Seo, Hee Seung Kim, Hyang Sook Kim, Ji Eun Hwang
  • Patent number: 12230667
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Grant
    Filed: June 30, 2022
    Date of Patent: February 18, 2025
    Assignees: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERISTY R&DB FOUNDATION
    Inventors: Sang Yeol Kang, Kyu Ho Cho, Han Jin Lim, Cheol Seong Hwang
  • Patent number: 12202876
    Abstract: The present invention relates to a transmembrane domain derived from human LRRC24 protein. More specifically, the present invention relates to a transmembrane domain derived from the human LRRC24 protein (LRRC24P transmembrane domain) or a cell-penetrating peptide, and an intracellular delivery system comprising same. The transmembrane domain derived from the human LRRC24 protein of the present invention can be used to deliver cargo materials such as compounds, biomolecules, and various polymer materials into cells. Since the LRRC24P transmembrane domain of the present invention exhibits higher cell penetration efficiency compared to conventional cell-penetrating peptides and is derived from human proteins, thus avoiding side effects and immune responses caused by peptides derived from foreign proteins, it can be usefully used as an effective intracellular delivery method for compounds, biomolecules, and various polymer materials applied to the human body.
    Type: Grant
    Filed: December 16, 2019
    Date of Patent: January 21, 2025
    Assignee: KOREA RESEARCH INSTITUTE OF CHEMICAL TECHNOLOGY
    Inventors: Seong Jun Kim, Kyun Do Kim, In Su Hwang, Keunbon Ku, Chonsaeng Kim, Bum Tae Kim, Dae Gyun Ahn, Hae Soo Kim, Young Chan Kwon
  • Publication number: 20240397699
    Abstract: The present disclosure discloses a capacitorless three-dimensional stacked DRAM device including a plurality of memory cell structures spaced apart from each other in horizontal and vertical directions, each of the plurality of memory cell structures including a horizontal read transistor structure and a horizontal write transistor structure, a plurality of write bit lines connected to the plurality of write transistor structures of the plurality of memory cell structures and extending in the horizontal direction, a plurality of read bit lines connected to the plurality of read transistor structures of the plurality of memory cell structures and extending in the horizontal direction, a plurality of write word lines connected to the plurality of write transistor structures and extending in the vertical direction, and a plurality of read word lines connected to the plurality of read transistor structures and extending in the vertical direction.
    Type: Application
    Filed: October 17, 2023
    Publication date: November 28, 2024
    Inventors: Cheol Seong Hwang, Seo Young Jang, Han Chul Lee
  • Publication number: 20240298453
    Abstract: Disclosed is a crossbar array device applicable to graph data analysis including a plurality of word lines extending in a first direction; a plurality of bit lines extending in a second direction intersecting the plurality of word lines; a plurality of conductor cells disposed in intersection regions corresponding to a diagonal among a plurality of intersection regions defined between the plurality of word lines and the plurality of bit lines; and a plurality of rectifying resistance change cells disposed in remaining intersection regions excluding the diagonal among the plurality of intersection regions, having a rectifying characteristic and storing a changeable resistance state.
    Type: Application
    Filed: March 1, 2024
    Publication date: September 5, 2024
    Inventors: Cheol Seong Hwang, Yoon Ho Jang, Jang Uk Han
  • Publication number: 20240221657
    Abstract: An electroluminescent display apparatus may include a display panel including a plurality of pixels, each of the pixels including a light emitting device, and a controller. The controller may be configured to receive an input image data for a corresponding pixel among the pixels, determine accumulated stress data applied to the light emitting device in the corresponding pixel due to an accumulation of image implemented in the corresponding pixel while being driven, determine a stress compensation gain corresponding to the accumulated stress data, determine a target compensation gain based on the stress compensation gain and at least one of a lower limit compensation gain and an upper limit compensation gain, and output a corrected input image data based on the input image data and the target compensation gain for driving the corresponding pixel.
    Type: Application
    Filed: November 28, 2023
    Publication date: July 4, 2024
    Applicant: LG Display Co., Ltd.
    Inventors: Ho Seong HWANG, Hyun Woo CHO, Seung Yeon KIM
  • Publication number: 20240215265
    Abstract: The present disclosure relates to a temporal kernel device including at least one temporal kernel cell structure, wherein each of the temporal kernel cell structure including a nonvolatile memristor; and a resistor and a capacitor connected in parallel to each other, and the resistor and the capacitor connected in parallel are connected in series to the nonvolatile memristor.
    Type: Application
    Filed: May 19, 2022
    Publication date: June 27, 2024
    Inventors: Cheol Seong Hwang, Yoon Ho Jang
  • Publication number: 20240105963
    Abstract: A method for manufacturing a gas diffusion layer for a fuel cell wherein carbon nanotubes are impregnated into Korean paper, thereby enhancing electroconductivity, and a gas diffusion layer manufactured thereby. The method for manufacturing a gas diffusion layer for a fuel cell which is to manufacture a gas diffusion layer as a constituent member of a unit cell in a fuel cell, includes a support preparation step of preparing a support with Korean paper; a dispersion preparation step of dispersing a carbon substance in a solvent to form a dispersion, a coating step of coating the support with the dispersion, and a thermal treatment step of thermally treating the dispersion-coated support to fix the carbon substance to the support.
    Type: Application
    Filed: March 6, 2023
    Publication date: March 28, 2024
    Inventors: Seung Tak Noh, Ji Han Lee, In Seok Lee, Jae Man Park, Won Jong Choi, Choong Hee Kim, Seong Hwang Kim, Jong Hoon Lee, Soo Jin Park, Seul Yi Lee
  • Publication number: 20230109869
    Abstract: Provided are compositions for preventing or treating cancer including Asarum maculatum Nakai extracts, or a fraction thereof. According to an aspect, an Asarum maculatum Nakai extract has an excellent anticancer efficacy against various cancers including diffuse-type gastric cancer, and a cancer treatment agent having an excellent effect may be developed by using the extract as an active ingredient.
    Type: Application
    Filed: October 7, 2022
    Publication date: April 13, 2023
    Applicants: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY, INDUSTRY-ACADEMIC COOPERATION FOUNDATION, YONSEI UNIVERSITY
    Inventors: Hak Cheol KWON, Jaeyoung KWON, Seong-Hwan KIM, Jung Hwan LEE, Jin Wook CHA, Ho Seong HWANG, Won Kyu KIM, Yujin KWON, Suyeon CHO, Taek Joo LEE, Jung Hwa KANG, Wan Hee LEE, Hyunki KIM
  • Patent number: 11574677
    Abstract: A nonvolatile memory device and a method of operating the same are provided. The nonvolatile memory device may include a memory cell array having a vertical stack-type structure, a control logic, and a bit line. The memory cell array may include memory cells that each include corresponding portions of a semiconductor layer and a resistance change layer. The control logic, in a read operation, may be configured to apply a first voltage to a non-select memory cell and a second voltage to a non-select memory cell. The first voltage turns on current only in the semiconductor layer portion of the non-select memory cell. The second voltage turns on current in both the semiconductor layer and resistance change layer portions of the select memory cell. The bit line may be configured to apply a read voltage to the select memory cell during the read operation.
    Type: Grant
    Filed: July 26, 2021
    Date of Patent: February 7, 2023
    Assignees: Samsung Electronics Co., Ltd., Seoul National University R&DB Foundation
    Inventors: Jungho Yoon, Cheol Seong Hwang, Soichiro Mizusaki, Youngjin Cho
  • Publication number: 20220336574
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Application
    Filed: June 30, 2022
    Publication date: October 20, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sang Yeol KANG, Kyu Ho CHO, Han Jin LIM, Cheol Seong HWANG
  • Patent number: 11411069
    Abstract: A semiconductor device including a switching element on a substrate, a pad isolation layer on the switching element, a conductive pad passing through the pad isolation layer and connected to the switching element, an insulating pattern on the pad isolation layer and having a height greater than a horizontal width, a lower electrode on side surfaces of the insulating pattern on side surfaces of the insulating pattern and in contact with the conductive pad, a capacitor dielectric layer on the lower electrode and having a monocrystalline dielectric layer and a polycrystalline dielectric layer, the monocrystalline dielectric layer being relatively close to side surfaces of the insulating pattern compared to the polycrystalline dielectric layer an upper electrode on the capacitor dielectric layer may be provided.
    Type: Grant
    Filed: September 24, 2020
    Date of Patent: August 9, 2022
    Assignees: Samsung Electronics Co., Ltd., SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION
    Inventors: Sang Yeol Kang, Kyu Ho Cho, Han Jin Lim, Cheol Seong Hwang
  • Publication number: 20210393723
    Abstract: Provided are methods of reducing and killing bacteria and fungi, and photodynamic treatment methods and sterilization methods using the methods of reducing and killing bacteria and fungi. The method of reducing and killing bacteria and fungi includes bringing a composition including a Ligularia fischeri extract or a fraction thereof as an active ingredient into contact with cells or tissues of a subject and irradiating cells or tissues of a subject in contact with the composition with an absorbable wavelength of excitation light.
    Type: Application
    Filed: June 22, 2021
    Publication date: December 23, 2021
    Applicant: KOREA INSTITUTE OF SCIENCE AND TECHNOLOGY
    Inventors: Kyungsu KANG, Jae Young KWON, Hak Cheol KWON, Jin Chul KIM, Jin Soo PARK, Ho Seong HWANG, Seemi Tasnim ALAM