Patents by Inventor In-Sun Jang

In-Sun Jang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180189272
    Abstract: Disclosed are an apparatus and method for sentence abstraction. According to one embodiment of the present disclosure, the method for abstracting a sentence includes receiving a plurality of sentences including natural language; generating a sentence vector for each of the plurality of sentences by using a recurrent neural network model; grouping the plurality of sentences into one or more clusters by using the sentence vector; and generating the same sentence ID for sentences grouped into the same cluster among the plurality of sentences.
    Type: Application
    Filed: December 21, 2017
    Publication date: July 5, 2018
    Inventors: Hyung Jong Noh, Yeon Soo Lee, Jun Yeop Lee, Jung Sun Jang
  • Publication number: 20180189271
    Abstract: Disclosed are an apparatus and method for verifying a sentence. According to one embodiment of the present disclosure, the method for verifying a sentence includes receiving a sentence automatically generated from a plurality of pieces of data, and the plurality of pieces of data; generating a first embedding vector for each word included in the sentence; generating a second embedding vector for each of the plurality of pieces of data; and generating a verification result value regarding the sentence by using a determination model including a first convolutional neural network for generating a feature vector from the first embedding vector and a second convolutional neural network for generating a feature vector from the second embedding vector.
    Type: Application
    Filed: December 21, 2017
    Publication date: July 5, 2018
    Inventors: Hyung Jong Noh, Yeon Soo Lee, Jung Sun Jang, Sang Min Heo
  • Publication number: 20180189387
    Abstract: Disclosed are an apparatus and method for learning a narrative of a document, and an apparatus and method for generating a narrative of a document. According to an embodiment of the present disclosure, the narrative learning method includes the steps of receiving a plurality of documents, generating a topic database which includes one or more topics and words related to each of the one or more topics from the plurality of documents, splitting each of the plurality of documents into one or more segments including one or more sentences by using the topic database, grouping the segments split from each of the plurality of documents into one or more clusters, and generating a cluster label for each of the one or more clusters.
    Type: Application
    Filed: December 22, 2017
    Publication date: July 5, 2018
    Inventors: Hyung Jun Kim, Hyung Jong Noh, Yeon Soo Lee, Jung Sun Jang
  • Publication number: 20180189274
    Abstract: Disclosed are an apparatus and method for generating a natural language. According to an embodiment of the present disclosure, the method for generating the natural language includes receiving a plurality of pieces of data, generating a sentence ID sequence including one or more sentence IDs from the plurality of pieces of data, and generating a sentence corresponding to each of the sentence IDs included in the sentence ID sequence from the sentence ID sequence and the plurality of pieces of data.
    Type: Application
    Filed: December 22, 2017
    Publication date: July 5, 2018
    Inventors: Hyung Jong Noh, Yeon Soo Lee, Jun Yeop Lee, Jung Sun Jang
  • Patent number: 10006121
    Abstract: Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.
    Type: Grant
    Filed: February 25, 2014
    Date of Patent: June 26, 2018
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Sung Kil Cho, Hai Won Kim, Sang Ho Woo, Seung Woo Shin, Gil Sun Jang, Wan Suk Oh
  • Publication number: 20180140658
    Abstract: Provided are a pharmaceutical composition for wound healing including a surfactant, an antioxidant, a thickener, and SP, a method of treating a wound including administering the pharmaceutical composition to a subject, and a quasi-drug composition for wound healing including a surfactant, an antioxidant, a thickener, and substance. The pharmaceutical composition of the present invention reduces a wound size, generates new blood vessels, shows dermal and epidermal regeneration effects, matures granulation tissues, and synthesizes collagen, and thus may be used for wound healing.
    Type: Application
    Filed: January 10, 2018
    Publication date: May 24, 2018
    Applicant: Biosolution Co., Ltd
    Inventors: Da Jung Kim, Ji Hae Jang, Jung Sun Lee, Song Sun Jang
  • Publication number: 20170186932
    Abstract: Disclosed is a spin thermoelectric device comprising: a transparent base material; and a plurality of spin thermoelectric elements and a plurality of electrode pads which are provided on the base material, wherein the spin thermoelectric element comprises a thermoelectric layer formed by a sol-gel method and made of a material that shows a spin Seebeck effect caused by a temperature gradient based on a heat source, and an electrode layer formed on the thermoelectric layer. The spin thermoelectric device is applicable to cladding of building, a greenhouse, etc. and used as a light source for lighting and a heat source for cooling/heating in such a manner that it transmits light and is charged with electricity when there is sunlight or there is difference in temperature between the inside of the building and the outside and it discharges electricity when there is no sunlight or there are no differences in temperature between the inside of the building and the outside.
    Type: Application
    Filed: December 19, 2016
    Publication date: June 29, 2017
    Applicant: UNIST (ULSAN NATIONAL INSTITUTE OF SCIENCE AND TECHNOLOGY)
    Inventors: Ki-Suk LEE, Min-Sun JANG
  • Publication number: 20170130719
    Abstract: An oil seal apparatus and a blower including the same are disclosed. The oil seal apparatus and the blower can assemble a body pipe quickly regardless of assembling direction of the body pipe when assembling the body pipe by forming a plurality of oil return holes, i.e., forming more than four or five oil return holes at upper portion, lower portion, left portion, and right portion of an outboard surface of the body pipe. The oil seal apparatus may be mounted in a shaft through-hole formed at an oil box of a blower.
    Type: Application
    Filed: October 20, 2016
    Publication date: May 11, 2017
    Inventor: Hong-sun JANG
  • Publication number: 20170110440
    Abstract: Provided are a semiconductor package and method for manufacturing the same. The semiconductor package includes a first semiconductor chip. A first mold layer is disposed on sidewalls of the first semiconductor chip. A second mold layer is disposed on an upper surface of the first mold layer. A first lower via hole penetrates the first mold layer. A first upper via hole penetrates the second mold layer. A first metal pad is disposed between the first upper via hole and the first lower via hole.
    Type: Application
    Filed: August 24, 2016
    Publication date: April 20, 2017
    Inventors: HYUNG-SUN JANG, GA-YOUNG KIM
  • Publication number: 20160289831
    Abstract: Provided is a substrate processing apparatus. The substrate processing apparatus includes a lower chamber having an opened upper side, an upper chamber opening or closing the upper side of the lower chamber, the upper chamber defining an inner space, in which a process is performed on a substrate, together with the lower chamber, a showerhead disposed on a lower portion of the upper chamber to supply a reaction gas toward the inner space, wherein a buffer space is defined between the showerhead and the upper chamber, a partition member disposed in the buffer space to partition the buffer space into a plurality of diffusion regions, and a plurality of gas supply ports disposed in the upper chamber to supply the reaction gas toward each of the diffusion regions.
    Type: Application
    Filed: December 10, 2014
    Publication date: October 6, 2016
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Sung-Tae JE, Gil Sun JANG, Chang-Hoon YUN, Kyong-Hun KIM
  • Patent number: 9425057
    Abstract: A method for manufacturing a memory device having a vertical structure according to one embodiment of the present invention comprises: a step for alternatingly laminating one or more insulation layers and one or more sacrificial layers on a substrate; a step for forming a penetration hole for penetrating the insulation layer and the sacrificial layer; a step for forming a pattern for filling up the penetration hole; a step for forming an opening for penetrating the insulation layer and the sacrificial layer; and a step for removing the sacrificial layer by supplying an etchant through the opening, wherein the step for laminating the insulation layer includes a step for depositing a first silicon oxide film by supplying to the substrate at least one gas selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and the step for laminating the sacrificial layer includes a step for depositing a second silicon oxide film by supplying dichlorosilane (SiCl2H2) to the substrate.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: August 23, 2016
    Assignee: Eugene Technology Co., Ltd.
    Inventors: Sung Kil Cho, Hai Won Kim, Sang Ho Woo, Seung Woo Shin, Gil Sun Jang, Wan Suk Oh
  • Patent number: 9396954
    Abstract: Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.
    Type: Grant
    Filed: October 6, 2011
    Date of Patent: July 19, 2016
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Sung Kil Cho, Hai Won Kim, Sang Ho Woo, Seung Woo Shin, Gil Sun Jang, Wan Suk Oh
  • Publication number: 20160144396
    Abstract: A thin film deposition mask assembly and an in-line type thin film deposition apparatus for deposition of an organic material on a substrate, the mask assembly including a carrier, the carrier being configured to mount and carry a substrate; and a mask, the mask being integrally coupled with the carrier, and having an opening for depositing an organic material on the substrate.
    Type: Application
    Filed: June 18, 2015
    Publication date: May 26, 2016
    Inventors: Hee Sun JANG, Joo Seob AHN, Jae Ha LIM, Yong Hyun JIN
  • Patent number: 9179218
    Abstract: A mobile device for providing multi-channel sound collection and output using a common connector, and a driving method thereof are provided. A mobile device having a sound compressor and a sound decompressor includes a connector slidably receiving a sound collector plug or a sound output plug, a plug identification unit for, if one of the sound collector plug and the sound output plug is coupled to the connector, identifying if the plug coupled to the connector is the sound collector plug or is the sound output plug, a switching unit for electrically coupling the plug coupled to the connector, to the sound compressor, or electrically coupling the plug coupled to the connector, to the sound decompressor, and a controller for controlling switching of the switching unit according to the identification outcome.
    Type: Grant
    Filed: July 25, 2012
    Date of Patent: November 3, 2015
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-Hoon Jeong, Ju-Hee Chang, Hyo-Sun Jang
  • Patent number: 8937012
    Abstract: Provided is a production method for a semiconductor device comprising a metal silicide layer. According to one embodiment of the present invention, the production method for a semiconductor device comprises the steps of: forming an insulating layer on a substrate, on which a polysilicon pattern has been formed, in such a way that the polysilicon pattern is exposed; forming a silicon seed layer on the exposed polysilicon pattern that has been selectively exposed with respect to the insulating layer; forming a metal layer on the substrate on which the silicon seed layer has been formed; and forming a metal silicide layer by carrying out a heat treatment on the substrate on which the metal layer has been formed.
    Type: Grant
    Filed: August 30, 2011
    Date of Patent: January 20, 2015
    Assignee: Eugene Technology Co., Ltd.
    Inventors: Hai Won Kim, Sang Ho Woo, Sung Kil Cho, Gil Sun Jang
  • Patent number: 8852988
    Abstract: A semiconductor package and a method for manufacturing the same are provided. The semiconductor package includes a semiconductor chip having a first surface, a second surface and a pixel area, first adhesion patterns disposed on the first surface, second adhesion patterns disposed between the first adhesion patterns and the pixel area and disposed on the first surface, and external connection terminals disposed on the second surface, wherein the second adhesion patterns and the external connection terminals are disposed to overlap each other.
    Type: Grant
    Filed: June 4, 2013
    Date of Patent: October 7, 2014
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Hyung-Sun Jang, Woon-Seong Kwon, Tae-Je Cho, Un-Byoung Kang, Jung-Hwan Kim
  • Publication number: 20140261186
    Abstract: Provided is a method of manufacturing a memory device having a 3-dimensional structure, which includes alternately stacking one or more dielectric layers and one or more sacrificial layers on a substrate, forming a through hole passing through the dielectric layers and the sacrificial layers, forming a pattern filling the through hole, forming an opening passing through the dielectric layers and the sacrificial layers, and supplying an etchant through the opening to remove the sacrificial layers. The stacking of the dielectric layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, and Si4H10, to deposit a silicon oxide layer. The stacking of the sacrificial layers includes supplying the substrate with one or more gases selected from the group consisting of SiH4, Si2H6, Si3H8, Si4H10, and dichloro silane (SiCl2H2), and ammonia-based gas, to deposit a silicon nitride layer.
    Type: Application
    Filed: February 25, 2014
    Publication date: September 18, 2014
    Applicant: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Sung Kil CHO, Hai Won KIM, Sang Ho WOO, Seung Woo SHIN, Gil Sun JANG, Wan Suk OH
  • Patent number: 8651388
    Abstract: A method for reading a code displayed on printed matter is disclosed. The present invention is implemented by reading a segment code referring to predetermined data, which is displayed, extracting direction information of the read segment code, and interpreting the data which the read segment code refers to on the basis of the extracted direction information. According to the present invention, the code printed on the printed matter is read without using a bar code to output text, voice, image, moving picture information, and the like corresponding to the read code.
    Type: Grant
    Filed: October 22, 2010
    Date of Patent: February 18, 2014
    Assignee: Intellectual Discovery Co., Ltd.
    Inventor: Hyo Sun Jang
  • Patent number: 8563349
    Abstract: A method of forming a semiconductor device includes preparing a semiconductor substrate having a plurality of chips formed thereon and a scribe lane disposed between the chips, simultaneously forming a groove having a first depth in the scribe lane, and a through hole penetrating the chips and having a second depth. The chips are separated along the groove. The first depth is smaller than the second depth.
    Type: Grant
    Filed: October 26, 2011
    Date of Patent: October 22, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jong-Yun Myung, Hyuek-Jae Lee, Ji-Sun Hong, Tae-Je Cho, Un-Byoung Kang, Hyung-Sun Jang, Eun-Mi Kim, Jung-Hwan Kim, Tae-Hong Min
  • Patent number: 8558371
    Abstract: Provided is a wafer level packaging method and a semiconductor device fabricated using the same. In the method, a substrate comprising a plurality of chips is provided. An adhesive layer is formed on the substrate corresponding to boundaries of the plurality of chips. A cover plate covering an upper portion of the substrate and having at least one opening exposing the adhesive layer or the substrate at the boundaries among the plurality of chips is attached to the adhesive layer.
    Type: Grant
    Filed: January 21, 2011
    Date of Patent: October 15, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: JiSun Hong, Taeje Cho, Un-Byoung Kang, Hyuekjae Lee, Youngbok Kim, Hyung-sun Jang