Patents by Inventor In T. Hwang
In T. Hwang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240134506Abstract: Systems and processes are disclosed for operating a digital assistant in a media environment. In an exemplary embodiment, a user can interact with a digital assistant of a media device while content is displayed by the media device. In one approach, a plurality of exemplary natural language requests can be displayed in response to detecting a user input of a first input type. The plurality of exemplary natural language requests can be contextually-related to the displayed content. In another approach, a user request can be received in response to detecting a user input of a second input type. A task that at least partially satisfies the user request can be performed. The performed task can depend on the nature of the user request and the content being displayed by the media device. In particular, the user request can be satisfied while reducing disruption to user consumption of media content.Type: ApplicationFiled: December 22, 2023Publication date: April 25, 2024Inventors: Lia T. NAPOLITANO, Grace H. HWANG, Henrique D. PENHA, Jeremiah D. SHAW, Jorge S. FINO
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Patent number: 11960707Abstract: An electronic device provides, to a display, data to present a user interface that includes a plurality of user interface objects, and a current focus on a first user interface object. While the display is presenting the user interface, the electronic device receives an input that corresponds to a movement of a contact across on a touch-sensitive surface. The electronic device, in response to receiving the input and in accordance with a determination that a first axis is a dominant axis, moves the current focus along the first axis by a first amount and along the second axis by a second amount. The amount of movement of the current focus along the second axis is reduced to a first non-zero amount by a scaling factor that is based on one or more inputs received prior to receiving the input.Type: GrantFiled: April 24, 2023Date of Patent: April 16, 2024Assignee: APPLE INC.Inventors: Marcos Alonso Ruiz, Nicole M. Wells, Justin T. Voss, Blake R. Seely, Matthew D. Ricketson, Henrique D. Penha, Grace H. Hwang, Graham R. Clarke, Jeffrey L. Robbin, William M. Bachman, Benjamin W. Keighran, Jennifer L. C. Folse, Jonathan Lochhead, Joe R. Howard, Joshua K. McGlinn
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Patent number: 11571462Abstract: The present invention provides a CCL20 locked dimer polypeptide, pharmaceutical compositions thereof, and methods of using said dimer in the treatment of psoriasis and psoriatic arthritis.Type: GrantFiled: July 30, 2020Date of Patent: February 7, 2023Assignee: The Medical College of Wisconsin, Inc.Inventors: Brian F. Volkman, Anthony E. Getschman, Sam T. Hwang, Yasutomo Imai, Francis C. Peterson
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Publication number: 20200360479Abstract: The present invention provides a CCL20 locked dimer polypeptide, pharmaceutical compositions thereof, and methods of using said dimer in the treatment of psoriasis and psoriatic arthritis.Type: ApplicationFiled: July 30, 2020Publication date: November 19, 2020Inventors: Brian F. Volkman, Anthony E. Getschman, Sam T. Hwang, Yasutomo Imai, Francis C. Peterson
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Patent number: 10738095Abstract: The present invention provides a CCL20 locked dimer polypeptide, pharmaceutical compositions thereof, and methods of using said dimer in the treatment of psoriasis, inflammatory disorders and autoimmune disease.Type: GrantFiled: May 31, 2016Date of Patent: August 11, 2020Assignee: The Medical College of Wisconsin, Inc.Inventors: Brian F. Volkman, Anthony E. Getschman, Sam T. Hwang, Yasutomo Imai, Francis C. Peterson
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Publication number: 20180237486Abstract: The present invention provides a CCL20 locked dimer polypeptide, pharmaceutical compositions thereof, and methods of using said dimer in the treatment of psoriasis, inflammatory disorders and autoimmune disease.Type: ApplicationFiled: May 31, 2016Publication date: August 23, 2018Inventors: Brian F. Volkman, Anthony E. Getschman, Sam T. Hwang, Yasutomo Imai, Francis C. Peterson
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Patent number: 9203968Abstract: A method for providing conference information to attendees of a conference call near real time using a plurality of conference bridges includes receiving the conference information at a first conference bridge. The conference information is generated in response to input from a participant in the conference call using a first device. The method also includes providing the conference information from the first conference bridge to a first group of attendees. The method also includes providing the conference information from the first conference bridge to a second conference bridge separate from the first conference bridge, and providing the conference information from the second conference bridge to a second group of attendees.Type: GrantFiled: June 9, 2014Date of Patent: December 1, 2015Assignee: ShoreTel, Inc.Inventors: Vu T. Hwang, Nam Do, Eric Carino, Pascal Crausaz
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Patent number: 8786669Abstract: A method for providing conference information to attendees of a conference call near real time using a plurality of conference bridges includes receiving the conference information at a first conference bridge. The conference information may include at least one of video or web data generated in response to input from a participant in the conference call using a first device. The method also includes providing the conference information from the first conference bridge to a first group of attendees. The method also includes providing the conference information from the first conference bridge to a second conference bridge separate from the first conference bridge, and providing the conference information from the second conference bridge to a second group of attendees.Type: GrantFiled: April 2, 2012Date of Patent: July 22, 2014Assignee: ShoreTel, Inc.Inventors: Vu T. Hwang, Nam Do, Eric Carino, Pascal Crausaz
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Patent number: 7884839Abstract: A method of enhancing the gray scale resolution of a PWM system. The method includes defining an N-bit PWM sequence with a length of 2N?1 units. The N-bit PWM sequence includes a least significant bit (LSB) segment characterized by a temporal length of one unit. In some embodiments, the temporal length of one unit is referred to as a time t0. The method also includes defining a fractional PWM sequence. The fractional PWM sequence includes the N-bit PWM sequence and a fractional bit segment of temporal length F. The temporal length of the fractional PWM sequence is 2N?1+F units. In a particular embodiment, F=1 and the temporal length of the fractional PWM sequence is 2N.Type: GrantFiled: December 5, 2005Date of Patent: February 8, 2011Assignee: Miradia Inc.Inventor: Michael Y. T. Hwang
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Patent number: 7109559Abstract: A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.Type: GrantFiled: November 5, 2004Date of Patent: September 19, 2006Assignee: International Business Machines CorporationInventors: Mukesh V. Khare, Christopher P. D'Emic, Thomas T. Hwang, Paul C. Jamison, James J. Quinlivan, Beth A. Ward
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Patent number: 7072395Abstract: A memory control apparatus for block-matching motion estimation and an associated search pattern for processing video sequence in real-time are described in this disclosure. The motion estimation subsystem utilizes a set of memory banks to store a section of the reference picture used for computing the differences between an underlying block and a spatially shifted reference block. The memory control apparatus derives the memory addresses for storing the reference picture region in the memory banks in such a way that a row or a column of data from the reference block can be accessed in parallel without wait. The row- or column-data are then made available to the parallel computation unit for computing the block difference in a single processing cycle. An associated spiral search pattern that covers the whole search region is also described that minimizes the required data access and consequently saves power consumption.Type: GrantFiled: July 20, 2001Date of Patent: July 4, 2006Assignee: ESS Technology, Inc.Inventors: Michael Y. T. Hwang, Chung-Ta Lee, Yi Liu
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Patent number: 6893979Abstract: A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.Type: GrantFiled: March 15, 2001Date of Patent: May 17, 2005Assignee: International Business Machines CorporationInventors: Mukesh V. Khare, Christopher P. D'Emic, Thomas T. Hwang, Paul C. Jamison, James J. Quinlivan, Beth A. Ward
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Patent number: 6635517Abstract: A method of forming a self-aligned gettering region within an SOI substrate is provided. Specifically, the inventive method includes the steps of forming a disposable spacer on each vertical sidewall of a patterned gate stack region, the patterned gate stack region being formed on a top Si-containing layer of an SOI substrate; implanting gettering species into the top Si-containing layer not protected by the disposable spacer and patterned gate stack region; and removing the disposable spacer and annealing the implanted gettering species so as to convert said species into a gettering region.Type: GrantFiled: August 7, 2001Date of Patent: October 21, 2003Assignee: International Business Machines CorporationInventors: Tze-Chiang Chen, Thomas T. Hwang, Mukesh V. Khare, Effendi Leobandung, Anda C. Mocuta, Paul A. Ronsheim, Ghavam G. Shahidi
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Publication number: 20030032251Abstract: A method of forming a self-aligned gettering region within an SOI substrate is provided. Specifically, the inventive method includes the steps of forming a disposable spacer on each vertical sidewall of a patterned gate stack region, the patterned gate stack region being formed on a top Si-containing layer of an SOI substrate; implanting gettering species into the top Si-containing layer not protected by the disposable spacer and patterned gate stack region; and removing the disposable spacer and annealing the implanted gettering species so as to convert said species into a gettering region.Type: ApplicationFiled: August 7, 2001Publication date: February 13, 2003Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Tze-Chiang Chen, Thomas T. Hwang, Mukesh V. Khare, Effendi Leobandung, Anda C. Mocuta, Paul A. Ronsheim, Ghavam G. Shahidi
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Publication number: 20030016748Abstract: A memory control apparatus for block-matching motion estimation and an associated search pattern for processing video sequence in real-time are described in this disclosure. The motion estimation subsystem utilizes a set of memory banks to store a section of the reference picture used for computing the differences between an underlying block and a spatially shifted reference block. The memory control apparatus derives the memory addresses for storing the reference picture region in the memory banks in such a way that a row or a column of data from the reference block can be accessed in parallel without wait. The row- or column-data are then made available to the parallel computation unit for computing the block difference in a single processing cycle. An associated spiral search pattern that covers the whole search region is also described that minimizes the required data access and consequently saves power consumption.Type: ApplicationFiled: July 20, 2001Publication date: January 23, 2003Applicant: Divio, Inc.Inventors: Michael Y.T. Hwang, Chung-Ta Lee, Yi Liu
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Publication number: 20020130377Abstract: A method for forming a gate dielectric for an integrated circuit device. In an exemplary embodiment of the invention, the method includes forming an initial oxynitride layer upon a substrate material, the oxynitride layer having an initial physical thickness. The initial oxynitride layer is then subjected to a plasma nitridation, the plasma nitridation resulting in final oxynitride layer having a final physical thickness.Type: ApplicationFiled: March 15, 2001Publication date: September 19, 2002Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Mukesh V. Khare, Christopher P. D'Emic, Thomas T. Hwang, Paul C. Jamison, J. J. Quinlivan, Beth A. Ward
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Publication number: 20010036709Abstract: A method is provided for planarizing a structure such as a shallow trench isolation region on a semiconductor substrate. A semiconductor substrate is provided having raised and lowered regions with substantially vertical and horizontal surfaces. The lowered regions may correspond to trench regions. Filler material such as non-conformal high density plasma oxide may be deposited over the horizontal surfaces to at least a thickness equal to a predetermined height so as to provide raised and lowered regions of the filler material. The raised regions of the filler material may then be selectively removed without removing the filler material in the lowered regions.Type: ApplicationFiled: June 20, 2001Publication date: November 1, 2001Inventors: John W. Andrews, Bao T. Hwang, Howard S. Landis, Shaw-Ning Mei, James M. Tyler, Edward J. Vishnesky
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Patent number: 6270353Abstract: A method is provided for planarizing a structure such as a shallow trench isolation region on a semiconductor substrate. A semiconductor substrate is provided having raised and lowered regions with substantially vertical and horizontal surfaces. The lowered regions may correspond to trench regions. Filler material such as non-conformal high density plasma oxide may be deposited over the horizontal surfaces to at least a thickness equal to a predetermined height so as to provide raised and lowered regions of the filler material. The raised regions of the filler material may then be selectively removed without removing the filler material in the lowered regions.Type: GrantFiled: June 7, 1999Date of Patent: August 7, 2001Assignee: International Business Machines CorporationInventors: John W. Andrews, Bao T. Hwang, Howard S. Landis, Shaw-Ning Mei, James M. Tyler, Edward J. Vishnesky
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Patent number: 5841482Abstract: A synchronization system aligns video signals without the use of a phase locked loop. One embodiment includes a delay line and a selection circuit. A clock signal with a desired frequency for a pixel clock is applied to the delay line to generate a series of delayed signals at taps on the delay line. When a transition in a horizontal sync signal occurs, the selection circuit senses delayed signals and selects a delayed signal having a transition aligned relative to the transition in the horizontal sync signal. This delayed signal is a pixel clock signal which is not subject to frequency fluctuation of a phase locked loop. Selecting a new delayed signal at each horizontal blanking period keeps the pixel clock for each line of video aligned to the horizontal sync signal.Type: GrantFiled: December 16, 1996Date of Patent: November 24, 1998Assignee: AuraVision CorporationInventors: Niantsu N. Wang, Sherman Tan King, Guorjuh T. Hwang
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Patent number: 5696527Abstract: In the preferred embodiment, the RGB analog signals generated by a VGA card in a personal computer are applied to a first input of an analog multiplexer. The digital video data stored in a video memory buffer on a video card is converted to RGB analog signals using a D/A converter, and these analog signals are applied to a second input of the analog multiplexer. An analog comparator compares a preselected color key to the analog output of the VGA card. When there is a match, the analog comparator controls the multiplexer to pass the analog video data to the monitor for display. When the color key is not detected, the data from the VGA card is transmitted to the monitor for display. Other features for improving the video overlay precision and the quality of the displayed image are also described.Type: GrantFiled: December 12, 1994Date of Patent: December 9, 1997Assignee: AurVision CorporationInventors: Sherman T. King, Tommy C. Lee, Niantsu Wang, Yen-Fah Chu, Scott A. Kimura, Guorjuh T. Hwang