Patents by Inventor In-Tsang Lin

In-Tsang Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230182257
    Abstract: An apparatus for chemical mechanical polishing of a wafer includes a process chamber and a rotatable platen disposed inside the process chamber. A polishing pad is disposed on the platen and a wafer carrier is disposed on the platen. A slurry supply port is configured to supply slurry on the platen. A process controller is configured to control operation of the apparatus. A set of microphones is disposed inside the process chamber. The set of microphones is arranged to detect sound in the process chamber during operation of the apparatus and transmit an electrical signal corresponding to the detected sound. A signal processor is configured to receive the electrical signal from the set of microphones, process the electrical signal to enable detection of an event during operation of the apparatus, and in response to detecting the event, transmit a feedback signal to the process controller.
    Type: Application
    Filed: January 30, 2023
    Publication date: June 15, 2023
    Inventors: Chih-Yu WANG, Tien-Wen WANG, In-Tsang LIN, Hsin-Hui CHOU
  • Patent number: 11565365
    Abstract: An apparatus for chemical mechanical polishing of a wafer includes a process chamber and a rotatable platen disposed inside the process chamber. A polishing pad is disposed on the platen and a wafer carrier is disposed on the platen. A slurry supply port is configured to supply slurry on the platen. A process controller is configured to control operation of the apparatus. A set of microphones is disposed inside the process chamber. The set of microphones is arranged to detect sound in the process chamber during operation of the apparatus and transmit an electrical signal corresponding to the detected sound. A signal processor is configured to receive the electrical signal from the set of microphones, process the electrical signal to enable detection of an event during operation of the apparatus, and in response to detecting the event, transmit a feedback signal to the process controller.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: January 31, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Yu Wang, Tien-Wen Wang, In-Tsang Lin, Hsin-Hui Chou
  • Patent number: 11017522
    Abstract: A system includes an inspection device and an image processing unit. The inspection device is configured to scan a wafer to generate an inspected image. The image processing unit is configured to receive the inspected image, and is configured to analyze the inspected image by using at least one deep learning algorithm in order to determine whether there is any defect image shown in a region of interest in the inspected image. When there is at least one defect image shown in the region of interest in the inspected image, the inspection device is further configured to magnify the region of interest in the inspected image to generate a magnified inspected image for identification of defects.
    Type: Grant
    Filed: April 18, 2019
    Date of Patent: May 25, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Pin Chou, In-Tsang Lin, Sheng-Wen Huang, Yu-Ting Wang, Jui-Kuo Lai, Hsin-Hui Chou, Jun-Xiu Liu, Tien-Wen Wang
  • Patent number: 10872793
    Abstract: In a method of operating an apparatus for manufacturing or analyzing semiconductor wafers, sound in a process chamber of the apparatus during an operation of the apparatus is detected. An electrical signal corresponding to the detected sound is acquired by a signal processor. The acquired electrical signal is processed by the signal processor. An event during the operation of the apparatus is detected based on the processed electrical signal. The operation of the apparatus is controlled according to the detected event.
    Type: Grant
    Filed: September 12, 2018
    Date of Patent: December 22, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chih-Yu Wang, Tien-Wen Wang, Hsin-Hui Chou, In-Tsang Lin
  • Publication number: 20200334800
    Abstract: A system includes an inspection device and an image processing unit. The inspection device is configured to scan a wafer to generate an inspected image. The image processing unit is configured to receive the inspected image, and is configured to analyze the inspected image by using at least one deep learning algorithm in order to determine whether there is any defect image shown in a region of interest in the inspected image. When there is at least one defect image shown in the region of interest in the inspected image, the inspection device is further configured to magnify the region of interest in the inspected image to generate a magnified inspected image for identification of defects.
    Type: Application
    Filed: April 18, 2019
    Publication date: October 22, 2020
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chung-Pin CHOU, In-Tsang LIN, Sheng-Wen HUANG, Yu-Ting WANG, Jui-Kuo LAI, Hsin-Hui CHOU, Jun-Xiu LIU, Tien-Wen WANG
  • Patent number: 10510660
    Abstract: The present disclosure provides an inductor structure. The inductor structure, comprising a first surface, a second surface intersecting with the first surface, a first conductive pattern and a second conductive pattern. The first conductive pattern is formed on the first surface. The second conductive pattern is formed on the second surface. The first conductive pattern is connected with the second conductive pattern.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: December 17, 2019
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Ting Chen, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20190143474
    Abstract: An apparatus for chemical mechanical polishing of a wafer includes a process chamber and a rotatable platen disposed inside the process chamber. A polishing pad is disposed on the platen and a wafer carrier is disposed on the platen. A slurry supply port is configured to supply slurry on the platen. A process controller is configured to control operation of the apparatus. A set of microphones is disposed inside the process chamber. The set of microphones is arranged to detect sound in the process chamber during operation of the apparatus and transmit an electrical signal corresponding to the detected sound. A signal processor is configured to receive the electrical signal from the set of microphones, process the electrical signal to enable detection of an event during operation of the apparatus, and in response to detecting the event, transmit a feedback signal to the process controller.
    Type: Application
    Filed: October 30, 2018
    Publication date: May 16, 2019
    Inventors: Chih-Yu WANG, Tien-Wen WANG, In-Tsang LIN, Vivian CHOU
  • Publication number: 20190148191
    Abstract: In a method of operating an apparatus for manufacturing or analyzing semiconductor wafers, sound in a process chamber of the apparatus during an operation of the apparatus is detected. An electrical signal corresponding to the detected sound is acquired by a signal processor. The acquired electrical signal is processed by the signal processor. An event during the operation of the apparatus is detected based on the processed electrical signal. The operation of the apparatus is controlled according to the detected event.
    Type: Application
    Filed: September 12, 2018
    Publication date: May 16, 2019
    Inventors: Chih-Yu WANG, Tien-Wen WANG, Vivian CHOU, In-Tsang LIN
  • Publication number: 20180350740
    Abstract: The present disclosure provides an inductor structure. The inductor structure, comprising a first surface, a second surface intersecting with the first surface, a first conductive pattern and a second conductive pattern. The first conductive pattern is formed on the first surface. The second conductive pattern is formed on the second surface. The first conductive pattern is connected with the second conductive pattern.
    Type: Application
    Filed: August 6, 2018
    Publication date: December 6, 2018
    Inventors: WEI-TING CHEN, IN-TSANG LIN, VINCENT CHEN, CHUEI-TANG WANG, CHEN-HUA YU
  • Patent number: 10128203
    Abstract: A fan-out package structure is disclosed. The fan-out package structure includes an antenna main body; a redistribution layer (RDL); and an antenna auxiliary body in the RDL. An antenna system is also disclosed. The antenna system includes: an antenna main body, arranged to provide a first resonance; and an antenna auxiliary body, arranged to provide a second resonance through parasitic coupling to the antenna main body; wherein a dimension of the antenna main body is greater than a dimension of the antenna auxiliary body. An associated semiconductor packaging method is also disclosed.
    Type: Grant
    Filed: February 2, 2016
    Date of Patent: November 13, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Ting Chen, Tzu-Chun Tang, Ming Hung Tseng, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang, Hung-Yi Kuo
  • Patent number: 10043745
    Abstract: The present disclosure provides an inductor structure. The inductor structure, comprising a first surface, a second surface intersecting with the first surface, a first conductive pattern and a second conductive pattern. The first conductive pattern is formed on the first surface. The second conductive pattern is formed on the second surface. The first conductive pattern is connected with the second conductive pattern.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: August 7, 2018
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wei-Ting Chen, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang, Chen-Hua Yu
  • Publication number: 20170287832
    Abstract: The present disclosure provides an inductor structure. The inductor structure, comprising a first surface, a second surface intersecting with the first surface, a first conductive pattern and a second conductive pattern. The first conductive pattern is formed on the first surface. The second conductive pattern is formed on the second surface. The first conductive pattern is connected with the second conductive pattern.
    Type: Application
    Filed: April 1, 2016
    Publication date: October 5, 2017
    Inventors: WEI-TING CHEN, IN-TSANG LIN, VINCENT CHEN, CHUEI-TANG WANG, CHEN-HUA YU
  • Publication number: 20170221838
    Abstract: A fan-out package structure is disclosed. The fan-out package structure includes an antenna main body; a redistribution layer (RDL); and an antenna auxiliary body in the RDL. An antenna system is also disclosed. The antenna system includes: an antenna main body, arranged to provide a first resonance; and an antenna auxiliary body, arranged to provide a second resonance through parasitic coupling to the antenna main body; wherein a dimension of the antenna main body is greater than a dimension of the antenna auxiliary body. An associated semiconductor packaging method is also disclosed.
    Type: Application
    Filed: February 2, 2016
    Publication date: August 3, 2017
    Inventors: WEI-TING CHEN, TZU-CHUN TANG, MING HUNG TSENG, IN-TSANG LIN, VINCENT CHEN, CHUEI-TANG WANG, HUNG-YI KUO
  • Patent number: 9601439
    Abstract: A semiconductor structure includes a substrate, a die disposed over the substrate, and including a die pad disposed over the die and a seal ring disposed at a periphery of the die and electrically connected with the die pad, a polymeric layer disposed over the die, a via extending through the polymeric layer and electrically connected with the die pad, and a molding disposed over the substrate and surrounding the die and the polymeric layer, wherein the seal ring is configured for grounding.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: March 21, 2017
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Tzu-Chun Tang, Shou Zen Chang, Wei-Ting Chen, In-Tsang Lin, Vincent Chen, Chuei-Tang Wang, Kai-Chiang Wu, Chun-Lin Lu
  • Publication number: 20170062353
    Abstract: A semiconductor structure includes a substrate, a die disposed over the substrate, and including a die pad disposed over the die and a seal ring disposed at a periphery of the die and electrically connected with the die pad, a polymeric layer disposed over the die, a via extending through the polymeric layer and electrically connected with the die pad, and a molding disposed over the substrate and surrounding the die and the polymeric layer, wherein the seal ring is configured for grounding.
    Type: Application
    Filed: August 31, 2015
    Publication date: March 2, 2017
    Inventors: TZU-CHUN TANG, SHOU ZEN CHANG, WEI-TING CHEN, IN-TSANG LIN, VINCENT CHEN, CHUEI-TANG WANG, KAI-CHIANG WU, CHUN-LIN LU
  • Publication number: 20110056228
    Abstract: The present invention discloses a cooling apparatus for Nuclear Magnetic Resonance Imaging (NMRI) RF coils comprising a base, a cup, an input tube and an output tube. The input tube and the output tube are connected to the cup, in which the base and the cup are tightly sucked together to form a vacuum space by the vacuum caused by the negative pressure when the air is drawn out. The vacuum is able to block the conduction of low temperature. The base, the cup, the input tube and the output tube may be made of heat-isolation materials with high strength of hardness. The main objective of the present invention is to provide a low temperature system for long time use by the protection of a vacuum space; therefore the particular RF coil is used to retrieve NMRI signals. By reducing the resistance, the noise is therefore restrained, and the signal-to-noise ratio is enhanced to achieve high resolution and the scanning time is significantly reduced.
    Type: Application
    Filed: September 10, 2010
    Publication date: March 10, 2011
    Inventors: Jyh-Horng CHEN, In-Tsang Lin