Patents by Inventor In Yang

In Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10527473
    Abstract: A microwave flowmeter and a flow rate measurement method are provided. The microwave flowmeter includes a transmitting circuit, a detecting circuit, and a computing unit. The transmitting circuit includes a substrate, a plurality of resonator elements, and a transmission line. Two ends of the transmission line receive high frequency electric feedings, so that the resonator elements separately generate corresponding microwaves and each of the microwaves has at least one resonant frequency. The detecting circuit detects offsets of the corresponding resonant frequencies that are caused when a fluid flows through the resonator elements, and records times at which the offsets happen. The computing unit is electrically connected to the detecting circuit, and computes a flow rate of the fluid according to the times at which the offsets happen of the resonant frequencies and locations that are of the resonator elements and that correspond to a flow path.
    Type: Grant
    Filed: November 29, 2017
    Date of Patent: January 7, 2020
    Assignee: NATIONAL CHENG KUNG UNIVERSITY
    Inventors: Ching-Lung Yang, Chia-Ming Hsu
  • Patent number: 10525695
    Abstract: A three-dimensional (3D) printing apparatus includes a tank containing a forming material in liquid, a platform dipped into or moved away the forming material, a curing device disposed besides the tank or the platform, and a control device electrically connected to at least one of the tank and the platform and the curing device. An inner bottom of the tank includes a forming area and a peeling area in a stepped shape, and the forming area is higher than the peeling area. A 3D printing method includes providing the 3D printing apparatus, then the liquid-state forming material between the platform and the forming area is cured to form a solidification layer. Afterwards, a position and an occupied proportion of the solidification layer corresponding to the inner bottom, and a movement range of a relative movement is determined according thereto so as to completely peel off the solidification layer.
    Type: Grant
    Filed: February 15, 2017
    Date of Patent: January 7, 2020
    Assignees: XYZprinting, Inc., Kinpo Electronics, Inc.
    Inventors: Ting-Yu Lu, Peng-Yang Chen
  • Patent number: 10525831
    Abstract: A vehicle includes a first battery configured to output power at a first voltage, a second battery configured to output power at a second voltage, and a direct current (DC)-DC converter configured to convert the first voltage of the first battery to the second voltage and supply power at the second voltage to the second battery. The DC-DC converter includes a transformer, at least one switch, at least one rectifying diode, and a snubber circuit. The transformer is configured to transform the first voltage to the second voltage. The at least one switch is configured to control a first current input to the transformer from the first battery. The at least one rectifying diode is configured to rectify an alternate current (AC) output from the transformer. The snubber circuit is configured to prevent overvoltage from being applied to the at least one rectifying diode.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: January 7, 2020
    Assignees: HYUNDAI MOTOR COMPANY, KIA MOTORS CORPORATION, Korea University Research and Business Foundation
    Inventors: JinYoung Yang, Taejong Ha, Youngjin Kim, Yong Sin Kim, Sang-hun Lee
  • Patent number: 10529610
    Abstract: Apparatus and method for transferring a substrate are disclosed. The substrate transfer apparatus includes: a substrate conveyance assembly disposed between a mechanical arm and a wafer stage, the substrate conveyance assembly including a substrate loading conveyor and a substrate unloading conveyor parallelly arranged in a first direction, each of the substrate loading conveyor and the substrate unloading conveyor configured for transferring a substrate between the wafer stage and the mechanical arm along a second direction perpendicular to the first direction; an integral frame; and a transition air suspension assembly fixed to the integral frame at the end thereof proximal to the wafer stage, the transition air suspension assembly being able to engage with either of the substrate loading conveyor and the substrate unloading conveyor for producing an air film to levitate the substrate during the conveyance of the substrate by the substrate loading conveyor or the substrate unloading conveyor.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: January 7, 2020
    Assignee: SHANGHAI MICRO ELECTRONICS EQUIPMENT (GROUP) CO., LTD.
    Inventors: Xiao Liang, Yang Li
  • Patent number: 10530725
    Abstract: Technologies are described to increase a data limit for a user by introducing additional archive mailboxes as the original archive fills up or subsequently added archive mailboxes fill up. Thus, a user's data limit may be effectively removed through the use of additional archive mailboxes. In some examples, the additional mailboxes may be integrated into the architecture of the communication application such that their use is transparent to the user and/or an administrator of the communication application or associated service through the use of an application programming interface (API) that exposes a single multivalued strongly typed collection instead of dealing with multiple attributes and extending the schema every time a new type needs to be added. A mailbox locations attribute may act as the main storage of serialized mailbox locations and a mailbox identifier attribute may be used for indexing.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: January 7, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Dheepak Ramaswamy, Sanjay Ramaswamy, Le-Wu Tung, Song Yang, Julian Zbogar-Smith, Gagandeep Kohli, Sowmy Srinivasan, Kamal Janardhan
  • Patent number: 10525150
    Abstract: A contrast agent having a contrast protein have contrast properties and at least one targeting moiety, wherein the at least one targeting moiety is operatively linked to or incorporated within the contrast protein. Methods for targeting contrast agents and for preparing such agents are included.
    Type: Grant
    Filed: May 16, 2016
    Date of Patent: January 7, 2020
    Assignee: Georgia State University Research Foundation, Inc.
    Inventors: Jenny J. Yang, Zhi-Ren Liu
  • Patent number: 10528249
    Abstract: A method and apparatus for reproducing a portion of handwriting displayed on a screen in a same temporal manner in which the handwriting was handwritten.
    Type: Grant
    Filed: September 26, 2014
    Date of Patent: January 7, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Pil-seung Yang, Da-hye Park, Seol-hye Won, In-kuk Yun, Yong-gook Park
  • Patent number: 10530561
    Abstract: Apparatus and associated methods relate to using a high learning rate to speed up the training of a receiver and switching from a high learning rate to a low learning rate for fine tuning based on exponentially weighted moving average convergence. In an illustrative example, a selection circuit may switch the high learning rate to the low learning rate based on a comparison of a moving average difference en to a predetermined stability criteria T1 of the receiver. The moving average difference en may include an exponentially weighted moving average of a difference between two consecutive exponentially weighted moving averages of an operation parameter un of the signal communication channel. By using this method, the training time for the receiver may be advantageously reduced.
    Type: Grant
    Filed: March 20, 2019
    Date of Patent: January 7, 2020
    Inventors: Zao Liu, Yang Liu, Zhaoyin D. Wu, Geoffrey Zhang, Yu Xu, Alan C. Wong
  • Patent number: 10529797
    Abstract: A semiconductor device includes a semiconductor region, deep trenches, a dielectric film, a conductive material, an interlayer insulating film, and a metal interconnection. The semiconductor region has a first conductivity type in a silicon substrate. The deep trenches are disposed in the semiconductor region. The dielectric film is disposed on sidewalls of the deep trenches. The conductive material is disposed on the dielectric film. The interlayer insulating film is disposed on upper surface portions of the deep trenches to create a void inside each of the deep trenches. The metal interconnection is disposed on the interlayer insulating film.
    Type: Grant
    Filed: June 6, 2018
    Date of Patent: January 7, 2020
    Assignee: MagnaChip Semiconductor, Ltd.
    Inventors: Yang Beom Kang, Kang Sup Shin
  • Patent number: 10527793
    Abstract: When routing light on photonic integrated circuit (PIC) chips optical back-reflection and scattering can be highly detrimental to the desired application. Unused ports of optical devices, such as MMI, DC, Y-junction, PD, etc. are a cause for back-reflection and scattering, whereby the scattered light could get picked up by adjacent components, e.g. photodetectors. Management of stray light on the PIC is needed to prevent the undesired coupling between various components and to reduce noise. A dump taper may be used to guide and scatter stray light away from sensitive components or fully absorb the light while maintaining very low reflection from the taper. A doped dump taper may be used to passively absorb light reaching the unused port, thereby eliminating unwanted reflection and scattering. Alternatively, an undoped taper may be used to scatter light away from sensitive components while maintaining very low back-reflection.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: January 7, 2020
    Assignee: Elenion Technologies, LLC
    Inventors: Yang Liu, Ruizhi Shi, Tal Galfsky
  • Patent number: 10529366
    Abstract: A data storage medium may have increased data capacity by being configured with first and second patterned pedestals that are each separated from a substrate by a seed layer. A first polymer brush layer can be positioned between the first and second patterned pedestals atop the seed layer and a second polymer brush layer may be positioned atop each patterned pedestal. The first and second polymer brush layers may be chemically different and a block copolymer can be deposited to self-assemble into separate magnetic domains aligned with either the first or second polymer brush layers.
    Type: Grant
    Filed: April 11, 2017
    Date of Patent: January 7, 2020
    Assignee: Seagate Technology LLC
    Inventors: Austin P. Lane, Xiaomin Yang, ShuaiGang Xiao, Kim Yang Lee, David S. Kuo
  • Patent number: 10529622
    Abstract: Methods are provided for fabricating void-free metallic interconnect structures with self-formed diffusion barrier layers. A seed layer is deposited to line an etched opening in a dielectric layer. A metallic capping layer is selectively deposited on upper portions and upper sidewall surfaces of the seed layer which define an aperture into the etched opening. An electroplating process is performed to plate metallic material on exposed surfaces of the seed layer within the etched opening, which are not covered by the capping layer to form a metallic interconnect. The capping layer prohibits plating of metallic material on the capping layer and closing the aperture before the electroplating process is complete. A thermal anneal process is performed to cause the metallic material of the metallic capping layer to diffuse though the metallic interconnect and create a self-formed diffusion barrier layer between the metallic interconnect and the surfaces of the etched opening.
    Type: Grant
    Filed: July 10, 2018
    Date of Patent: January 7, 2020
    Assignee: International Business Machines Corporation
    Inventors: Joseph F. Maniscalco, Koichi Motoyama, James J. Kelly, Hosadurga Shobha, Chih-Chao Yang
  • Patent number: 10530006
    Abstract: The present invention relates to an electrode assembly, and more specifically to an electrode assembly for a polymer secondary battery cell, including a cell stack part defined by stacking at least one radical unit having a four-layered structure in which a first electrode, a first separator, a second electrode and a second separator are stacked in turn, wherein at least one of the first electrode and the second electrode has a size corresponding to 99.7% to 100% of a size of the first separator or the second separator and thus is aligned to be coincided with or close to an end of the first separator or the second separator.
    Type: Grant
    Filed: September 23, 2014
    Date of Patent: January 7, 2020
    Assignee: LG Chem, Ltd.
    Inventors: Chang Bum Ahn, Ji Won Park, Young Joo Yang
  • Patent number: 10527926
    Abstract: A droplet collection bucket includes a droplet collection tube, a level sensor positioned on the droplet collection tube, a gate valve configured to close a rear portion of the droplet collection tube, a gas supply configured to supply a gas into the rear portion of the droplet collection tube, a heating element wrapping around the droplet collection tube, and a drain tube connecting an interior of the droplet collection tube with an outside of the droplet collection tube.
    Type: Grant
    Filed: February 28, 2019
    Date of Patent: January 7, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi Yang, Hsin-Feng Chen, Li-Jui Chen
  • Patent number: 10529725
    Abstract: A method includes etching a first semiconductor fin and a second semiconductor fin to form first recesses. The first and the second semiconductor fins have a first distance. A third semiconductor fin and a fourth semiconductor fin are etched to form second recesses. The third and the fourth semiconductor fins have a second distance equal to or smaller than the first distance. An epitaxy is performed to simultaneously grow first epitaxy semiconductor regions from the first recesses and second epitaxy semiconductor regions from the second recesses. The first epitaxy semiconductor regions are merged with each other, and the second epitaxy semiconductor regions are separated from each other.
    Type: Grant
    Filed: November 30, 2018
    Date of Patent: January 7, 2020
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Kai-Hsuan Lee, Chia-Ta Yu, Cheng-Yu Yang, Sheng-Chen Wang, Sai-Hooi Yeong, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 10528081
    Abstract: One embodiment provides an apparatus. The apparatus includes a source conductive path to couple to a load conductive path and to a power source. The source conductive path is included in a garment and the load conductive path is related to a head mounted wearable device (HMWD).
    Type: Grant
    Filed: December 26, 2014
    Date of Patent: January 7, 2020
    Assignee: Intel Corporation
    Inventors: Hong W. Wong, Songnan Yang, Xiaoguo Liang, Wah Yiu Kwong, Cheong W Wong
  • Patent number: 10527763
    Abstract: An ocular optical system configured to allow imaging rays from a display frame to enter an observer's eye through the ocular optical system to form an image is provided. The ocular optical system includes a lens element having an eye-side surface and a display-side surface. The lens element has an optical axis extending from a display side toward an eye side. The display-side surface of the lens element adopts a Fresnel lens design. The display-side has a plurality of effective sub-surfaces and a plurality of ineffective sub-surfaces. The effective sub-surfaces are configured to allow the image rays to form an image. Each ineffective sub-surface connects two adjacent effective sub-surfaces. The ocular optical system satisfies: 25.000°???52.000°, where ? represents a maximum tilting angle of the effective sub-surfaces relative to a reference plane perpendicular to the optical axis.
    Type: Grant
    Filed: January 24, 2019
    Date of Patent: January 7, 2020
    Assignee: GENIUS ELECTRONIC OPTICAL CO., LTD.
    Inventors: Chun-Yang Huang, Wan-Chun Chen
  • Patent number: 10526258
    Abstract: The present invention provides a process for producing butadiene by oxidative dehydrogenation of butylene, comprising: a reaction stage, wherein a multi-stage adiabatic fixed bed in series is used, wherein butylene, oxygen-comprising gas and water are reacted in the presence of a catalyst in each stage of the adiabatic fixed bed with the first stage of the adiabatic fixed bed being further separately fed a diluent, being nitrogen and/or carbon dioxide, and the molar ratio between this separately fed diluents and the oxygen of all the oxygen-comprising gases fed in the subsequent stage(s) of the adiabatic fixed bed being controlled, wherein the oxygen-comprising gas is air, oxygen-enriched air or oxygen, and at least one of all the oxygen-comprising gases fed in the subsequent stage(s) of the adiabatic fixed bed is oxygen-enriched air having a specific oxygen concentration or oxygen; and a post treatment stage, wherein the effluent from the last stage of the adiabatic fixed bed is treated to obtain a product b
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: January 7, 2020
    Assignee: WISON ENGINEERING LTD.
    Inventors: Wenshu Yang, Yongjun Wu, Yansheng Li
  • Patent number: D872022
    Type: Grant
    Filed: April 21, 2017
    Date of Patent: January 7, 2020
    Assignee: Jetmax Lighting Industrial Co., Limited
    Inventor: Ping Yang
  • Patent number: D872161
    Type: Grant
    Filed: July 10, 2017
    Date of Patent: January 7, 2020
    Assignee: Ubiquiti Inc.
    Inventors: Robert J. Pera, Tsung Hwa Yang