Abstract: A proximity sensor system for detecting the presence of an object includes a light emitter configured to project light in a first direction, an optical element configured to steer the light, and a sensor. The optical element has a first surface configured to receive the light from the light emitter and a second surface that is non-parallel to the first surface. The second surface is configured to transmit a first portion of the light in a second direction and internally reflect a second portion of the light from the light emitter. The optical element includes a third surface configured to prevent internal reflection of the second portion of the light by the third surface. The sensor is configured to detect at least a portion of the first portion of the light returned from the object and transmitted through the second surface and the first surface of the optical element.

Abstract: A short-channel metal oxide semiconductor varactor may include a source region of a first polarity having a source via contact. The varactor may further include a drain region of the first polarity having a drain via contact. The varactor may further include a channel region of the first polarity between the source region and the drain region. The channel region may include a gate. The varactor may further include at least one self-aligned contact (SAC) on the gate and between the source via contact and the drain via contact.

Abstract: A method, non-transitory computer readable medium and storage controller computing device that retrieves an anchor record from a shared memory of a peer storage controller using a direct memory access (DMA) provider device. The anchor record includes an indication of a message first in first out (FIFO) memory region of the peer storage controller. A work request is obtained from a queue. The work request is inserted into the queue by a client application using an application programming interface (API). One of a plurality of types of the work request is determined. The DMA provider device is instructed based on the determined type of the work request and, when the determining indicates that the work request is a request to send a network message, use the message FIFO memory region of the peer storage controller computing device.

Abstract: Aspects of the technology described herein can facilitate computing on transient resources. An exemplary computing device may use a task scheduler to access information of a computational task and instability information of a transient resource. Moreover, the task scheduler can schedule the computational task to use the transient resource based at least in part on the rate of data size reduction of the computational task. Further, a checkpointing scheduler in the exemplary computing device can determine a checkpointing plan for the computational task based at least in part on a recomputation cost associated with the instability information of the transient resource. Resultantly, the overall utilization rate of computing resources is improved by effectively utilizing transient resources.

Abstract: A display panel includes a base substrate, an active pattern on the base substrate, and including a first active pattern of a first transistor, and a second active pattern of a second transistor, a gate pattern on the base substrate, and including a first gate electrode that overlaps the first active pattern, and a second gate electrode that overlaps the second active pattern, an insulation layer covering the gate pattern, a first conductive pattern on the insulation layer, and electrically connected to the first gate electrode through a first contact hole formed through the insulation layer, and a second conductive pattern electrically connected to the second gate electrode through a second contact hole formed through the insulation layer, wherein each of the first contact hole and the second contact hole overlaps, partially overlaps, or does not overlap each of the first active pattern and the second active pattern, and wherein a first overlapped area at which the first active pattern overlaps the first con

Abstract: The present disclosure relates to aniline pyrimidine derivatives or pharmaceutically acceptable salts thereof as EGFR inhibitors, specifically relates to compounds represented by formula (I) or pharmaceutically acceptable salts, pharmaceutical compositions, the method and uses thereof for treating EGFR mediated diseases.

Abstract: An algebra and differential equations model of a physical system is constructed based on available training data and physical system characteristics. A hybrid calibration process is carried out to iteratively calibrate both time-insensitive and time-sensitive parameters of the algebra and differential equations model so as to obtain parameter vectors. Vector auto-regression is applied to the parameter vectors to predict values of the parameters for a future time period.

Abstract: A semiconductor package structure includes a first substrate, at least one first semiconductor element and a second substrate. The first semiconductor element is attached to the first substrate. The second substrate defines a cavity and includes a plurality of thermal vias. One end of each of the thermal vias is exposed in the cavity, and the first semiconductor element is disposed within the cavity and thermally connected to the thermal vias.

Abstract: The invention concerns a structure of a readout circuit, formed on a semiconductor substrate (1) of a first type, and intended to measure the charges received from an external charge source (2) external to the substrate (1) according to successive charge integration cycles, said structure comprising: an injection diode configured to inject, into the substrate (1), the charges received from the external charge source (2), a collector diode suitable for collecting, in the substrate (1), at least a portion of the charges injected by the injection diode and for accumulating said charges during an integration cycle, a charge recovery structure (7), configured to recover the charges accumulated in said collector diode, means for initializing the charge recovery structure (7) at the end of each integration cycle, by restoring the electrical potential of said charge recovery structure to an initial potential.

Abstract: A semiconductor package assembly having a first semiconductor package, with a first redistribution layer (RDL) structure, a first semiconductor die having through silicon via (TSV) interconnects formed passing therethrough coupled to the first RDL structure, and a second semiconductor package stacked on the first semiconductor package with a second redistribution layer (RDL) structure. The assembly further includes a second semiconductor die without through silicon via (TSV) interconnects formed passing therethrough, coupled to the second RDL structure, and a third semiconductor package stacked on the second semiconductor package, having a third redistribution layer (RDL) structure, a third semiconductor die without through silicon via (TSV) interconnects formed passing therethrough coupled to the third RDL structure.

Abstract: A lighting circuit uses a tapped linear driver architecture in which there are at least two LED types; a first LED type with a first forward voltage, and a second LED type with a second forward voltage at least double the first forward voltage. The first segment of the tapped linear driver comprises more LEDs of the first type than the second type and the last segment comprises more LEDs of the second type than the first type. This arrangement enables a reduction in the number of LEDs needed, but without significantly impacting on the efficiency of the circuit.

Abstract: A machine learning algorithm is trained to learn to cluster a plurality of original-destination routes in a network for transporting cargo into a plurality of clusters based on similarities of the original-destination routes, and to learn to cluster the plurality of clusters into a plurality of subgroups based on customer behavior. Influencing criteria associated with each of the subgroups may be determined and based on the influencing criteria, a price elasticity curve for each of the subgroups may be generated. Based on the price elasticity curve and current network traffic, cargo transportation price associated with each of the subgroups may be determined.

Abstract: At least some embodiments of the present disclosure relate to a semiconductor device package. The semiconductor device package includes a carrier having a first surface and including a power layer adjacent to the first surface of the carrier, an electrical component disposed on the first surface of the carrier, and a conductive element disposed on the first surface of the carrier. The electrical component is electrically connected to the power layer. The conductive element is electrically connected to the power layer. The conductive element, the power layer, and the electrical component form a power-transmission path.

Abstract: CNN based digital IC for AI contains a number of CNN processing units. Each CNN processing unit contains CNN logic circuits operatively coupling to a memory subsystem. A first subsystem includes an array of first magnetic random access memory (RAM) cells for storing weights and an array of second magnetic RAM cells for storing input signals. A second subsystem includes an array of first magnetic RAM cells for storing one-time-programming weights and an array of second magnetic RAM cells for storing input signals. A third subsystem includes an array of first magnetic RAM cells for storing weights, an array of second magnetic RAM cells for storing input signals and an array of third magnetic RAM cells for storing one-time-programming unique data pattern for security identification. Either MLC STT-RAM or MLC OST-MRAM containing at least two MTJ elements can be configured as different memories for forming memory subsystem.

Abstract: Disclosed are methods and apparatuses to recognize actors during normal system operation. The method includes defining actor input such as hand gestures, executing and detecting input, and identifying salient features of the actor therein. A model is defined from salient features, and a data set of salient features and/or model are retained, and may be used to identify actors for other inputs. A command such as “unlock” may be executed in response to actor input. Parameters may be applied to further define where, when, how, etc. actor input is executed, such as defining a region for a gesture. The apparatus includes a processor and sensor, the processor defining actor input, identifying salient features, defining a model therefrom, and retaining a data set. A display may also be used to show actor input, a defined region, relevant information, and/or an environment. A stylus or other non-human actor may be used.

Abstract: An improved solvent system for the formulation and application of N-alkyl thiophosphoric triamide urease inhibitors. These formulations provide safety and performance benefits relative to existing alternatives and enable storage, transport and subsequent coating or blending with urea based or organic based fertilizers. These formulations are comprised primarily of environmentally friendly aprotic and protic solvents (particularly dimethyl sulfoxide and alcohols/polyols) to stabilize the urease inhibitor.

Abstract: A terahertz wave fast modulator based on coplanar waveguide combining with transistor is disclosed. The terahertz waves are inputted through a straight waveguide structure, and then are coupled through a probe structure onto a core part of the present invention, which includes a suspended coplanar waveguide structure and a modulation unit with high electron mobility transistor, wherein the suspended coplanar waveguide structure is formed by three metal wires and a semiconductor substrate; and the modulation unit with high electron mobility transistor is located between adjacent metal transmission strips of the coplanar waveguide structure. Transmission characteristics of the terahertz waves in the coplanar waveguide structure are changed through the switching on/off of the modulation unit, so as to fast modulate the amplitudes and phases of the terahertz waves, and finally the modulated terahertz waves are transmitted through a probe—waveguide structure.

Abstract: A test probe head for probe testing multiple chips on a wafer in a single probing. A probe head substrate includes an array of probe tip attach pads on one surface. The array includes a subarray for each probe head chip test site. Probe tips attached to each probe tip attach pad have an across the head tip height variation less than one micrometer (1 ?m). The subarray probe tips may be on a pitch at or less than fifty microns (50 ?m). The test probe head may be capable of test probing all chips in a quadrant and even up to all chips on a single wafer in a single probing.

Abstract: When a terminal aggregates three downlink carriers by using the carrier aggregation (CA) of the LTE-A technology and transmits an uplink signal on two uplink carriers while aggregating two uplink carriers, a harmonic component and an intermodulation distortion (IMD) component are generated, thereby influencing a downlink band of the terminal itself. Therefore, the present specification presents a scheme therefor.

Abstract: A touch panel and a method for arranging electrodes of the touch panel are provided. The touch panel includes a plurality of touch sections. Each of the touch sections includes a first transmitter electrode, a first receiver electrode, a second transmitter electrode, a second receiver electrode, and a third receiver electrode. The first transmitter electrode has a first side and a second side opposite to the first side. The first receiver electrode adjoins the first side. The second transmitter electrode has a third side and a fourth side opposite to the third side. The second receiver electrode adjoins the second side and the third side. The third receiver electrode adjoins the fourth side.