Abstract: An opening and closing mechanism includes a connecting member and a sliding member. A movable panel of a sunroof device is fastened to the connecting member which has a plate-type connecting member main body extending in a front-rear direction, and a thickness direction of the connecting member main body coincides with a width direction. The connecting member main body is formed with a through hole which goes through the connecting member main body in the width direction and extends along the specified curve in the front-rear direction. The sliding member has a sliding member main body formed by sheet metal, the sliding member main body includes a pair of vertical walls and a connecting wall which connects upper ends of the vertical walls, and the connecting wall engages with and slides in the through hole so the connecting member inclines in an up-down direction or moves in the front-rear direction.

Abstract: Provided is a method that de-multiplexes a bit stream to extract intra prediction mode information and residual signals, restores an intra prediction mode of a current prediction unit using the intra prediction information and intra prediction modes of prediction units adjacent to the current prediction unit, generates reference pixels using one or more available reference pixel if there exist unavailable reference pixels of the prediction unit, adaptively filters the reference pixels based on the restored intra prediction mode, generates a prediction block using the restored intra prediction mode and the reference pixels, decodes the residual signal to generating a residual block, and generates a reconstructed block using the prediction block and the residual block. Accordingly, additional bits resulted from increase of a number of intra prediction mode are effectively reduced. Also, an image compression ratio can be improved by generating a prediction block similar to an original block.

Abstract: A printed circuit board includes a circuit substrate and a plurality of buffering circuits. The circuit substrate includes a substrate layer, and first and second circuit layers formed on either side of the substrate layer. The first circuit layer comprises a plurality of first conductive circuits. The second circuit layer comprises a plurality of second conductive circuits. A line width of each of the plurality of first conductive circuits is greater than a line width of each of the plurality of second conductive circuits. The plurality of buffering circuits electrically connect the first circuit layer to the second circuit layer and a line width of each of the plurality of buffering circuits is greater than the line width of each of the plurality of second conductive circuits.

Abstract: The present invention discloses a method for modifying a non-planar electrode, in which a short-chain molecule is used as a connector. The short-chain molecule is an alcohol compound having a thiol group at both ends. Therefore, the thiol groups at both the ends of the short-chain molecule can be separately bonded to a nanoparticle and a surface of an electrode, so that a plurality of nanoparticles are arranged on a surface of a non-planar electrode.

Abstract: Disclosed is a quasi-circulator using an asymmetric directional coupler. The quasi-circulator using the asymmetric directional coupler according to an embodiment of the present invention may enhance a characteristic of isolating a transmitting signal from a receiving signal with the same characteristic as transmitting signal loss of a symmetric directional coupler in the related art by arranging impedance of each line of a directional coupler asymmetrically.

Abstract: The present invention relates to an optical module and optical module system using the same. The optical module comprises a transceiving unit, an antenna and an MCU. The transceiving unit receives control commands from one or more control computers via the antenna and transfers them to the MCU. Then the MCU processes the control commands and provides feedback information to the one or more control computers through the transceiving unit. In the optical module of the present invention, as a result of an additional IOT wireless unit, the optical module is capable of communicating with remote control computers, thereby achieving remote testing and control for optical modules, instead of using conventional control methods for optical modules.

Abstract: An eight-frequency band antenna includes a carrier, a high-frequency segment, a low-frequency segment, a printed circuit board (PCB) and an inductor. The high-frequency segment is arranged on left side of the carrier and the low-frequency segment is arranged on right side of the carrier. The radiator on the bottom face of the carrier electrically connects with the micro strip of the PCB and the ground line of the ground metal when the carrier is fixed to the PCB. Moreover, the low-frequency segment is corresponding to a metal face with smaller area such that the low-frequency segment is at a free space to enhance the frequency response of the low-frequency segment and the bandwidth of the high-frequency segment. The area and the volume of blind hole on the carrier can adjust the effective dielectric constant to adjust the resonant frequency and bandwidth of the antenna.

Abstract: A table elevating device includes: a table, formed with a bottom surface, a first side edge and a second side edge spaced away from the first side edge; a support mechanism, vertically disposed for supporting the table, and at least including an electric pushing rod used for driving the support mechanism to be elevated; a driver, served to drive the electric pushing rod to be operated via electric power; and a controller, including a case body having a first case part and a second case part and disposed on the bottom surface, and a control circuit unit electrically connected to the driver; wherein, the second case part is formed with an expansion hole oriented to face the second side edge along an extending direction defined from the interior towards the exterior.

Abstract: In a method, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers are etched at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a first source/drain space in which the second semiconductor layers are exposed. A dielectric layer is formed at the first source/drain space, thereby covering the exposed second semiconductor layers. The dielectric layer and part of the second semiconductor layers are etched, thereby forming a second source/drain space. A source/drain epitaxial layer is formed in the second source/drain space. At least one of the second semiconductor layers is in contact with the source/drain epitaxial layer, and at least one of the second semiconductor layers is separated from the source/drain epitaxial layer.

Abstract: The present disclosure is directed to systems and methods for automated generation of a three-dimensional model of a container prior to dispensing material into the container. Using the three-dimensional model of the container, the systems and methods determine an available internal volume of the container and a fill volume of the container that takes into consideration one or more material parameters, such as material temperature. Using the determined fill volume, the systems and methods dispense one or more materials into the container to the determined fill volume. Where a plurality of materials are dispensed, the systems and methods may use a recipe to determine appropriate volumes of each of a plurality of materials to dispense to the container to provide the determined fill volume. Such systems and methods beneficially account for objects present in the container prior to dispensing materials into the container.

Abstract: The present disclosure, in some embodiments, relates to a multi-dimensional integrated chip structure. The structure includes a first interconnect layer within a first dielectric structure on a first substrate, and a second interconnect layer within a second dielectric structure on a second substrate. A bonding structure is between the first dielectric structure and the second substrate. An inter-tier interconnect structure extends through the second substrate and between a top of the first interconnect layer and a bottom of the second interconnect layer. The inter-tier interconnect structure includes a first region having substantially vertical sidewalls extending through the second substrate and a second region below the first region and having tapered sidewalls surrounded by the bonding structure.

Abstract: A cleaning mechanism of a 3D printer including a cleaning module, a first wiper, a second wiper, and a carrier is provided. The cleaning module has a top plane. The first wiper is arranged corresponding to the cleaning module and protruding beyond the top plane. The second wiper is arranged on the cleaning module and protruding beyond the top plane. The carrier is connected to a rail and suspended above the cleaning module. A modeling nozzle corresponding to the first wiper and a painting pen corresponding to the second wiper are arranged on the carrier and movable. The modeling nozzle and the painting pen are arranged respectively aligned to the first wiper and the second wiper. The modeling nozzle is allowed to move pass the first wiper and bypass the second wiper. The painting pen is allowed to move pass the second wiper and bypass the first wiper.

Abstract: In a method, a fin structure, in which first semiconductor layers and second semiconductor layers are alternately stacked, is formed. A sacrificial gate structure is formed over the fin structure. The first semiconductor layers are etched at a source/drain region of the fin structure, which is not covered by the sacrificial gate structure, thereby forming a first source/drain space in which the second semiconductor layers are exposed. A dielectric layer is formed at the first source/drain space, thereby covering the exposed second semiconductor layers. The dielectric layer and part of the second semiconductor layers are etched, thereby forming a second source/drain space. A source/drain epitaxial layer is formed in the second source/drain space. At least one of the second semiconductor layers is in contact with the source/drain epitaxial layer, and at least one of the second semiconductor layers is separated from the source/drain epitaxial layer.

Abstract: The present disclosure relates to a tissue diagnosis device including a plate supporter configured to support a plate on which a reaction region is placed and a sample is placed in the reaction region, a patch controller configured to support the patch which contains a labeling substance that specifically labels the target substance, and control a position of the patch relative to the reaction region so that the patch provides the labeling substance to the reaction region, and a target substance detector configured to detect the labeling substance and detect the target substance included in the tissue sample.

Abstract: A low-dropout regulator comprises a first switching transistor, a comparator, and a Miller capacitor. The first terminal of the first switching transistor is connected to a load, and the second terminal of the first switching transistor is connected to a power supply voltage. The first input terminal of the comparator is connected to a reference voltage, the second input terminal of the comparator is connected to the first terminal of the first switching transistor, and the output terminal of the comparator is connected to the control terminal of the first switching transistor. The first terminal of the Miller capacitor is connected to the control terminal of the first switching transistor, and the second terminal of the Miller capacitor is connected to the first terminal of the first switching transistor and the load.

Abstract: Structures and formation methods of a semiconductor device structure are provided. The semiconductor device structure includes a conductive feature in a first dielectric layer. The semiconductor device structure also includes an etching stop layer over the first dielectric layer and a second dielectric layer over the etching stop layer. The semiconductor device structure further includes a conductive via in the etching stop layer and the second dielectric layer. In addition, the semiconductor device structure includes a conductive line over the conductive via. The semiconductor device structure also includes a first barrier liner covering the bottom surface of the conductive line. The semiconductor device structure further includes a second barrier liner surrounding sidewalls of the conductive line and the conductive via. The conductive line and the conductive via are confined in the first barrier liner and the second barrier liner.

Abstract: A test circuit including: a plurality of first leads; a plurality of controllable switches each having a control terminal for receiving a control signal, a first terminal connected to a respective one of the plurality of first leads, and a second terminal for connection to a respective first signal line; and at least two short-circuit lines intersecting the first leads. Each of the short-circuit lines is connected to a respective subset of the plurality of first leads. Each of the plurality of first leads belongs to a corresponding one of the respective subsets, and the respective subsets are disjoint from each other.

Abstract: A method of forming a gate dielectric material includes forming a high-K dielectric material in a first region over a substrate, where forming the high-K dielectric material includes forming a first dielectric layer comprising hafnium over the substrate, and forming a second dielectric layer comprising lanthanum over the first dielectric layer.

Abstract: A wafer container includes a container body and a door. The container body has a pair of upright side walls, a top wall, a bottom wall and a rear wall cooperatively defining a container space with a front access opening. The door is removably engaged with the container body to close and seal the front access opening, and includes a front door panel, a rear door panel, and sealing means which is disposed at a periphery of the front door panel and configured to seal the gap between the door and the container body when the door is engaged with the container body to close the front access opening.

Abstract: Certain embodiments of the invention provide TiO2 nanoshell particles, methods of fabricating TiO2 nanoshell particles, and methods of enriching peptides in a sample using TiO2 nanoshell particles.