Patents by Inventor In Yang

In Yang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250119387
    Abstract: A method for processing time-sensitive data in a time-sensitive network includes acquiring a first time, a second time and a third time. The first time is a time when the data is actually scheduled, the second time is a time when a gate control operation of the data is planned to begin, and the third time is a duration of a gate control operation of the data. The method also includes identifying whether the data enters a sending queue abnormally based on the first time, the second time and the third time acquired. If the data enters a sending queue abnormally, inform a sender of the data to adjust a sending time.
    Type: Application
    Filed: September 24, 2024
    Publication date: April 10, 2025
    Applicant: Continental Automotive Technologies GmbH
    Inventors: Xianhui Yang, Xianfang Luo, Xuexue Lei
  • Publication number: 20250119154
    Abstract: A digital-to-analog converter device including a set of components, each component included in the set of components including a number of unit cells, each unit cell being associated with a unit cell size indicating manufacturing specifications of the unit cell is provided by the present disclosure. The digital-to-analog converter device further includes a plurality of switches, each switch included in the plurality of switches being coupled to a component included in the set of components, and an output electrode coupled to the plurality of switches. The digital-to-analog converter device is configured to output an output signal at the output electrode. A first unit cell size associated with a first unit cell included in the set of components is different than a second unit cell size associated with a second unit cell included in the set of components.
    Type: Application
    Filed: July 23, 2024
    Publication date: April 10, 2025
    Inventors: Zhi Yang, Anh Tuan Nguyen, Diu Khue Luu, Jian Xu
  • Publication number: 20250119852
    Abstract: A device, method, apparatus and computer readable storage medium for RMA generation are disclosed. A first device performs timing synchronization with a second device (210). The first device generates, at a first time instance, a first random media access control address, RMA, in accordance with a rule configuration information, to communicate with the second device (220). Further, the first device generates, at a second time instance, a second RMA in accordance with the rule configuration information to communicate with the second device (230). The rule configuration information comprises time instructions comprising information corresponding to the first time instance, and information on a period of time starting from the first time instance and ending at the second time instance.
    Type: Application
    Filed: May 31, 2022
    Publication date: April 10, 2025
    Inventors: Jianguo LIU, Zhijie YANG, Yan MENG, Tao TAO, Orhan Okan MUTGAN, Wenjian WANG
  • Publication number: 20250118598
    Abstract: An interconnection structure and a manufacturing method thereof are provided. The interconnection structure includes a first dielectric layer, a first conductive feature, a second dielectric layer, and a barrier layer. The first conductive feature is disposed on the first dielectric layer, the second dielectric layer is disposed on the first dielectric layer and surrounds the sidewalls of the first conductive feature, the barrier layer is disposed between the first dielectric layer and the second dielectric layer and between the sidewalls of the first conductive feature and the second dielectric layer.
    Type: Application
    Filed: October 4, 2023
    Publication date: April 10, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng-Chin LEE, Ting-Ya LO, Chi-Lin TENG, Shao-Kuan LEE, Kuang-Wei YANG, Gary HSU WEI LIU, Yen-Ju WU, Jing-Ting SU, Hsin-Yen HUANG, Hsiao-Kang CHANG, Wei-Chen CHU, Shu-Yun KU, Chia-Tien WU, Ming-Han LEE, Hsin-Ping CHEN
  • Publication number: 20250119115
    Abstract: The present application discloses a bulk acoustic wave resonator and a method for manufacturing the same. The bulk acoustic wave resonator includes a substrate and a plurality of resonance assemblies arranged on the substrate, each of the plurality of resonance assemblies includes a bottom electrode, a piezoelectric layer, and a top electrode which are arranged on the substrate in sequence; the plurality of resonance assemblies are connected in sequence to form a connecting ring; the top electrode of one resonance assembly in two adjacent resonance assemblies is connected to the bottom electrode of the other resonance assembly in the two adjacent resonance assemblies, and the top electrodes of two target resonance assemblies spaced apart by one resonance assembly are connected to each other to transmit an input signal; and the bottom electrodes of the two target resonance assemblies are connected to each other to transmit an output signal.
    Type: Application
    Filed: May 20, 2024
    Publication date: April 10, 2025
    Inventors: Jinhao DAI, Jinxian ZHANG, Tingting YANG, Si CHEN, Hanlong YUAN, Xin TONG, Liangyu LU, Guoqiang WU, Jian WANG, Bowoon SOON, Chengliang SUN
  • Publication number: 20250118792
    Abstract: The present invention relates to the technical field of electrochemistry, and in particular, to a structured electrode, a preparation method therefor and a use thereof. The structured electrode of the present invention comprises an electrode body, and a surface of the electrode body is provided with an etched structure; and the electrode body is of an array structure composed of three-dimensional electrode wires.
    Type: Application
    Filed: November 15, 2022
    Publication date: April 10, 2025
    Applicant: South China University of Technology
    Inventors: Wei YUAN, Yintong YE, Yang YANG, Xinzhu GAO, Chun WANG, Xiaoqing ZHANG
  • Publication number: 20250120072
    Abstract: A memory device includes a peripheral circuit layer including a peripheral circuit region. A cell layer is arranged at a different vertical level from the peripheral circuit layer and includes a cell region. A core layer is arranged between the peripheral circuit layer and the cell layer and is electrically connected to the peripheral circuit region and the cell region. The cell region includes a plurality of cell banks each including a memory component. The core circuit region includes a plurality of core banks arranged at positions at least partially vertically overlapping the plurality of cell banks, respectively. Each of the plurality of core banks includes a core circuit.
    Type: Application
    Filed: September 10, 2024
    Publication date: April 10, 2025
    Inventors: Seryeun YANG, Jinwoo HAN, Jeonil LEE
  • Publication number: 20250119827
    Abstract: The present disclosure provides a network energy saving method and apparatus, a device and a storage medium, which are applied to a network device. First, energy consumption indication information is acquired, which is used for indicating a target energy consumption state of the network device, and then data is transceived based on the target energy consumption state. In the embodiment of the present disclosure, an energy saving approach is configured for the network device, and then the target energy consumption state of the network device is indicated by indication information, so that the network device can determine the corresponding energy saving approach according to the target energy consumption state, thereby reducing the energy consumption of the network device.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 10, 2025
    Inventors: Meiying YANG, Jiaqing WANG, Chen LUO, Fang-chen CHENG, Yaomin LI, Yuwan SU, Yinghao ZHANG
  • Publication number: 20250119882
    Abstract: A resource indication method includes generating, by an access point, resource mapping information, where the resource mapping information includes a plurality of mapping segments, each mapping segment is associated with a frame type, each mapping segment includes a plurality of resource indicators, and each resource indicator indicates a resource allocated to a station in a frame corresponding to a frame type associated with a mapping segment to which the resource indicator belongs, and sending, by the access point, the resource mapping information.
    Type: Application
    Filed: December 16, 2024
    Publication date: April 10, 2025
    Inventors: Jian Yu, Xun Yang
  • Publication number: 20250120127
    Abstract: An integrated circuit device includes a p-type field effect transistor that includes a strained channel, the strained channel comprising a silicon channel and silicon germanium cladding layers on opposing surfaces thereof, the silicon germanium cladding layers abutting the silicon channel without being grown therefrom.
    Type: Application
    Filed: April 4, 2024
    Publication date: April 10, 2025
    Inventors: Myung Yang, Seungchan Yun, Kang-ill Seo
  • Publication number: 20250119910
    Abstract: Embodiments of the present disclosure provide a signaling transmission method, a device, and a storage medium. The method comprises: sending indication information on an uplink transmission resource allocated via a configured grant (CG), or receiving indication information on a downlink transmission resource allocated via semipersistent scheduling (SPS), and the indication information is configured for indicating a target transmission resource.
    Type: Application
    Filed: January 16, 2023
    Publication date: April 10, 2025
    Inventors: Yinghao ZHANG, Jiaqing WANG, Meiying YANG, Chen LUO, Yaomin LI
  • Publication number: 20250119683
    Abstract: A speaker assembly including a first speaker comprising a first diaphragm and a first voice coil movably coupled to a first magnet assembly, wherein the first diaphragm faces a first direction, the first voice coil moves along a first axis in the first direction when driven by an audio signal and the first magnet assembly is coupled to a fixed structure by a first compliant mounting member; and a second speaker laterally offset from the first speaker and including a second diaphragm and a second voice coil movably coupled to a second magnet assembly, wherein the second diaphragm faces a second direction different from the first direction, the second voice coil moves along a second axis in the second direction when driven by an audio signal and the second magnet assembly is coupled to the fixed structure by a second compliant mounting member.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Inventors: Bao Liu, Junyi Yang, Yin Yuan, Zhiwei Liu, Scott P. Porter, Jordi Antoni Garcia Selva, Kieran Poulain, Yanchu Xu, Kang Hou, Stuart M. Nevill
  • Publication number: 20250119897
    Abstract: A data transmission method, executed by an electronic device, includes: receiving periodicity information of a service data packet transmitted by an application object entity; configuring the periodicity information for an access network-network element by using a configuration instruction; receiving first indication information transmitted by the application object entity; and transmitting deactivation information to the access network-network element, wherein the first indication information indicates the periodicity information changes, and wherein the deactivation information indicates the access network-network element is to suspend scheduled transmission of the service data packet based on the periodicity information.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Applicant: TENCENT TECHNOLOGY (SHENZHEN) COMPANY LIMITED
    Inventors: Yixue LEI, Yuhang JIA, Yong YANG
  • Publication number: 20250119574
    Abstract: Motion compensation along different directions is disclosed. A method for video processing includes determining, for a conversion between a current video block of a video and a bitstream representation of the current video block, optical flow associated with the current video block in an optical flow-based motion refinement process or prediction process. The optical flow is derived along directions that are different from a horizontal direction and/or a vertical direction. The method also includes performing the conversion based on the optical flow.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Hongbin Liu, Li Zhang, Kai Zhang, Yang Wang, Jizheng Xu, Yue Wang
  • Publication number: 20250120049
    Abstract: A solid-state circuit breaker includes an airgap operating mechanism including components and electronics including semiconductors and software algorithms that control the power and can interrupt extreme currents. The SSCB further includes a housing that houses the components of the airgap operating mechanism and the electronics. The housing of the solid-state circuit breaker includes a heat sink that is part of an outer molded case such that a plastic part of the heat sink is over-molded onto a heat conducting piece that is directly connected to the semiconductors of the solid-state circuit breaker. The plastic part and the heat conducting piece are to be separated into two or more parts if the semiconductors are located at different locations on a printed circuit board such that a thermal bridge to conduct heat between the two or more parts and eventually to a plurality of fins external to the solid-state circuit breaker.
    Type: Application
    Filed: December 19, 2024
    Publication date: April 10, 2025
    Applicant: Siemens Industry, Inc.
    Inventors: Guang Yang, James Edward Ferree, Solomon R. Titus
  • Publication number: 20250119616
    Abstract: Systems and methods for a computer-based process that determines when a viewer is likely to skip over supplemental content and adjusts supplemental content presentation to compensate. Systems of embodiments of the disclosure may utilize various inputs to determine the likelihood of skipping supplemental content, including cursor position at or near specified icons or other UI elements, as well as user actions such as gaze direction, various motions or actions, controller manipulations, and the like. Once a likelihood of skipping supplemental content is determined, various actions may be taken in response, including without limitation selection of supplemental content that conveys its intended message prior to skipping, supplemental content that can be played at increased speed, and designation of supplemental content slots as skippable or non-skippable.
    Type: Application
    Filed: December 17, 2024
    Publication date: April 10, 2025
    Inventors: Jeffry Copps Robert Jose, Ankur Anil Aher, Cato Yang
  • Publication number: 20250119624
    Abstract: A method, apparatus, non-transitory computer readable medium, and system for generating synthetic videos includes obtaining an input prompt describing a video scene. The embodiments then generate a plurality of frame-wise token embeddings corresponding to a sequence of video frames, respectively, based on the input prompt. Subsequently, embodiments generate, using a video generation model, a synthesized video depicting the video scene. The synthesized includes a plurality of images corresponding to the sequence of video frames.
    Type: Application
    Filed: September 24, 2024
    Publication date: April 10, 2025
    Inventors: Seoung Wug Oh, Mingi Kwon, Joon-Young Lee, Yang Zhou, Difan Liu, Haoran Cai, Baqiao Liu, Feng Liu
  • Publication number: 20250120006
    Abstract: A printed circuit board includes a substrate; first and second through-portions penetrating between upper and lower surfaces of the substrate; a magnetic layer disposed in the first through-portion; a voltage regulator disposed in the second through-portion; a first through-hole penetrating between upper and lower surfaces of the magnetic layer; a first insulating layer disposed on the substrate, covering the magnetic layer and the voltage regulator, and filling the second through-portion and the first through-hole; a second through-hole penetrating between upper and lower surfaces of the first insulating layer in the first through-hole; a first wiring pattern disposed on an upper surface of the magnetic layer; a second wiring pattern disposed on a lower surface of the magnetic layer; and a first via pattern disposed in the second through-hole and connecting the first and second wiring patterns to each other.
    Type: Application
    Filed: July 18, 2024
    Publication date: April 10, 2025
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Dae Chul CHOI, Seung Bae LEE, Ye Ji KIM, Il Dong KIM, Woo Seok YANG, Ah Yeon IM, Kyoung Seok CHO, Jae Ho LEE
  • Publication number: 20250120108
    Abstract: A method for fabricating a GAA nanosheet structure, comprising: forming at least two channel layers and at least one sacrificial layer alternately stacked on a substrate to form a channel stack; forming, on the substrate, a dummy gate astride the channel stack; forming a first sidewall on a surface of the dummy gate; etching the sacrificial layer to form a recess at a side surface of the channel stack; forming a second sidewall within the recess; forming a source and a drain at two sides of the channel stack; in response to a channel layer being in contact with the dummy gate, etching the dummy gate and the channel layer to expose the at least one sacrificial layer, and then etching the at least one sacrificial layer to form a space for manufacturing a surrounding gate; and forming a metallic surrounding gate in the space.
    Type: Application
    Filed: November 27, 2023
    Publication date: April 10, 2025
    Inventors: Na ZHOU, Junjie LI, Jianfeng GAO, Tao YANG, Junfeng LI, Jun LUO
  • Publication number: 20250120122
    Abstract: One aspect of the present disclosure pertains to a semiconductor device. The semiconductor device includes a semiconductor substrate and a transistor formed over the semiconductor substrate. The transistor includes a first source/drain (S/D) feature, a second S/D feature, a channel region interposed between the first and second S/D features, and a gate stack engaging the channel region. The semiconductor device includes a first S/D contact landing on a top surface of the first S/D feature, a second S/D contact landing on a top surface of the second S/D feature, and a dielectric plug penetrating through the semiconductor substrate and landing on a bottom surface of the first S/D feature. The dielectric plug spans a width equal to or smaller than a width of the first S/D feature.
    Type: Application
    Filed: October 5, 2023
    Publication date: April 10, 2025
    Inventors: Chen-Ming Lee, Shih-Chieh Wu, Po-Yu Huang, I-Wen Wu, Fu-Kai Yang, Mei-Yun Wang