Patents by Inventor Inane Meric

Inane Meric has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods of forming substrate interconnect structures for enhanced thin seed conduction
    Patent number: 11652067
    Abstract: Methods/structures of forming substrate tap structures are described. Those methods/structures may include forming a plurality of conductive interconnect structures on an epitaxial layer disposed on a substrate, wherein individual ones of the plurality of conductive interconnect structures are adjacent each other, forming a portion of a seed layer on at least one of the plurality of conductive interconnect structures, and forming a conductive trace on the seed layer.
    Type: Grant
    Filed: December 28, 2016
    Date of Patent: May 16, 2023
    Assignee: Intel Corporation
    Inventors: Christopher J. Jezewski, Radek P. Chalupa, Flavio Griggio, Inane Meric, Jiun-Chan Yang