Patents by Inventor Inbar Schori

Inbar Schori has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8595584
    Abstract: A semiconductor device comprising processing logic. The processing logic is arranged to configure interleaver logic to re-order data symbols of a data stream according to a quadrature permutation polynomial function. The processing logic is further arranged to: divide a cyclic group of values defined by the QPP function into a set of subgroups, the set of subgroups being capable of being defined by a set of linear functions; derive inverse functions for the set of linear functions defining the subgroups; and configure the interleaver logic to load the data symbols of the data stream into a buffer at locations within the buffer corresponding to a cyclic group of values representative of the inverse function for the QPP function based on the inverse functions of the set of linear functions defining the subgroups.
    Type: Grant
    Filed: May 19, 2008
    Date of Patent: November 26, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Yuval Neeman, Guy Drory, Aviel Livay, Inbar Schori
  • Publication number: 20110060963
    Abstract: A semiconductor device comprising processing logic. The processing logic is arranged to configure interleaver logic to re-order data symbols of a data stream according to a quadrature permutation polynomial function. The processing logic is further arranged to: divide a cyclic group of values defined by the QPP function into a set of subgroups, the set of subgroups being capable of being defined by a set of linear functions; derive inverse functions for the set of linear functions defining the subgroups; and configure the interleaver logic to load the data symbols of the data stream into a buffer at locations within the buffer corresponding to a cyclic group of values representative of the inverse function for the QPP function based on the inverse functions of the set of linear functions defining the subgroups.
    Type: Application
    Filed: May 19, 2008
    Publication date: March 10, 2011
    Applicant: Freescale Semiconductor, Inc.
    Inventors: Yuval Neeman, Guy Drory, Aviel Livay, Inbar Schori
  • Patent number: 7760114
    Abstract: A method for generating an interleaved output during a decoding of a data block, the method includes: (i) selecting, in response to a row indicator, a row register and a multiplication factor to provide a selected row register and a selected multiplication factor; wherein the selected multiplication factor is responsive to a size of the data block; (ii) multiplying a value stored in the selected row register by the selected multiplication factor to provide an intermediate result; (iii) performing a modulo P operation on the intermediate result to provide a permutated result; wherein the permutated result and the value stored in the selected row register are adjacent elements of the same permutation; wherein P is responsive to a size of the data block; (iv) writing the permutated result to the selected row register; and (v) outputting a data block element that is selected in response to the permutated result.
    Type: Grant
    Filed: October 30, 2008
    Date of Patent: July 20, 2010
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Yuval Neeman, Guy Drory, Aviel Livay, Inbar Schori
  • Publication number: 20100111291
    Abstract: A method for generating an interleaved output during a decoding of a data block, the method includes: (i) selecting, in response to a row indicator, a row register and a multiplication factor to provide a selected row register and a selected multiplication factor; wherein the selected multiplication factor is responsive to a size of the data block; (ii) multiplying a value stored in the selected row register by the selected multiplication factor to provide an intermediate result; (iii) performing a modulo P operation on the intermediate result to provide a permutated result; wherein the permutated result and the value stored in the selected row register are adjacent elements of the same permutation; wherein P is responsive to a size of the data block; (iv) writing the permutated result to the selected row register; and (v) outputting a data block element that is selected in response to the permutated result.
    Type: Application
    Filed: October 30, 2008
    Publication date: May 6, 2010
    Inventors: Yuval NEEMAN, Guy DRORY, Aviel LIVAY, Inbar SCHORI