Patents by Inventor Inder Jit Verma

Inder Jit Verma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8598840
    Abstract: A fault tolerant battery management system includes redundancy, with applications including electric vehicles. Portions of its circuitry are constituted in distinct fault domains with control, monitoring, and balancing of cells circuitry fault-effect-isolated from the circuitry associated with built-in real-time testing. Built-in tests are orchestrated in fault domains isolated from the functional circuitry being verified. These built-in tests provide test stimulus unique for each cell measurement. Cell balancing is performed in a fault tolerant manner. It takes at least two independent faults, in two mutually distinct fault domains, to negatively affect balancing capability or to interfere with a redundant circuit's ability to operate. The built-in tests allow operation without the requirement for data cross-compare between redundant measuring electronic elements. Testing and balancing functions are interlocked through encoded enabling methodologies and transmit enables on serial buses.
    Type: Grant
    Filed: April 14, 2011
    Date of Patent: December 3, 2013
    Assignee: LaunchPoint Energy and Power LLC
    Inventors: Larry James Yount, Willard Ahart Blevins, Inder Jit Verma
  • Publication number: 20110254502
    Abstract: A fault tolerant battery management system includes redundancy, with applications including electric vehicles. Portions of its circuitry are constituted in distinct fault domains with control, monitoring, and balancing of cells circuitry fault-effect-isolated from the circuitry associated with built-in real-time testing. Built-in tests are orchestrated in fault domains isolated from the functional circuitry being verified. These built-in tests provide test stimulus unique for each cell measurement. Cell balancing is performed in a fault tolerant manner. It takes at least two independent faults, in two mutually distinct fault domains, to negatively affect balancing capability or to interfere with a redundant circuit's ability to operate. The built-in tests allow operation without the requirement for data cross-compare between redundant measuring electronic elements. Testing and balancing functions are interlocked through encoded enabling methodologies and transmit enables on serial buses.
    Type: Application
    Filed: April 14, 2011
    Publication date: October 20, 2011
    Inventors: Larry James Yount, Willard Ahart Blevins, Inder Jit Verma