Patents by Inventor Indo Chung
Indo Chung has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230307598Abstract: A display device can include a base part; first electrodes which extend in one direction and which are formed on the base part at certain intervals; an insulating layer formed on the base part to cover the first electrodes; second electrodes which extend in the same direction as the first electrodes and which are formed on the insulating layer so as to be arranged between the first electrodes; a partition part stacked on the insulating layer and the second electrodes while forming assembly holes so as to be overlapped on the first electrodes and the second electrodes; semiconductor light-emitting elements placed in the assembly holes; and third electrodes arranged on the partition part. The semiconductor light-emitting elements are not electrically connected to the first electrodes and are electrically connected to the second electrodes and the third electrodes.Type: ApplicationFiled: August 21, 2020Publication date: September 28, 2023Applicant: LG ELECTRONICS INC.Inventors: Sungyun PARK, Kisu KIM, Jinsung KIM, Indo CHUNG
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Publication number: 20230110862Abstract: A display apparatus according to the present invention comprises a substrate including semiconductor light-emitting devices and a wiring electrode electrically connected to the semiconductor light-emitting devices, wherein the substrate comprises: a base portion; assembly electrodes extending in one direction and arranged on the base portion; a dielectric layer formed to cover the assembly electrodes; a barrier portion formed on the dielectric layer while forming a cell on which the semiconductor light-emitting devices are mounted along an extension direction of the assembly electrodes; and a planarization layer formed to cover the barrier portion while forming a hole overlapping the cell, wherein the hole comprises: a first hole exposing the semiconductor light-emitting device; and a second hole exposing the dielectric layer or the base portion.Type: ApplicationFiled: February 25, 2020Publication date: April 13, 2023Applicant: LG ELECTRONICS INC.Inventors: Youngdo KIM, Soohyun KIM, Indo CHUNG, Jeonghyo KWON, Junoh SHIN
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Publication number: 20230049446Abstract: The present invention relates to a display apparatus, specifically to a display apparatus using semiconductor light-emitting elements of a few micrometers to tens of micrometers in size. The present invention provides a display apparatus comprising: a base part; a partition part having a plurality of grooves; a plurality of semiconductor light-emitting elements arranged on the base part and mounted in the plurality of grooves; first and second wiring electrodes arranged on one side and the other side of each of the semiconductor light-emitting elements, respectively; an assembly electrode arranged on the base part and arranged on the one side of each of the semiconductor light-emitting elements; and a dielectric layer arranged on the base part and arranged between the assembly electrode and the first wiring electrode, wherein each of the plurality of grooves includes at least one recess portion formed in the horizontal direction with respect to the base part.Type: ApplicationFiled: February 12, 2020Publication date: February 16, 2023Applicant: LG ELECTRONICS INC.Inventors: Soohyun KIM, Sungyun PARK, Indo CHUNG, Jeonghyo KWON
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Publication number: 20230005887Abstract: Discussed is a display device including a base portion; assembly electrodes that extend in one direction and are disposed on the base portion at predetermined intervals; a dielectric layer deposited on the base portion to cover the assembly electrodes; a first wiring electrode that extends in the same direction as the assembly electrodes and is disposed on the dielectric layer so as not to overlap the assembly electrodes; a partition wall portion deposited on the dielectric layer while arranging cells at predetermined intervals to overlap the assembly electrodes and the first wiring electrode along an extension direction of the assembly electrodes; and semiconductor light-emitting elements seated in the cells, respectively, wherein a solder layer electrically connecting a semiconductor light-emitting element seated in a cell and the first wiring electrode overlapping the cell is filled in the cell from among the plurality semiconductor light emitting elements and the cells.Type: ApplicationFiled: December 3, 2019Publication date: January 5, 2023Applicant: LG ELECTRONICS INC.Inventors: Jeonghyo KWON, Soohyun KIM, Indo CHUNG
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Patent number: 11522091Abstract: Disclosed is a solar cell. The solar cell includes a semiconductor substrate, conductivity-type regions located in or on the semiconductor substrate, electrodes conductively connected to the conductivity-type regions, and insulating films located on at least one of opposite surfaces of the semiconductor substrate, and including a first film and a second film located on the first film, the second film has a higher carbon content than that of the first film, a refractive index of the second film is equal to or less than a refractive index of the first film, and an extinction coefficient of the second film is equal to or greater than an extinction coefficient of the first film.Type: GrantFiled: January 26, 2017Date of Patent: December 6, 2022Inventors: Juhong Yang, Indo Chung, Eunjoo Lee, Mihee Heo
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Publication number: 20220375915Abstract: The present disclosure provides a novel form of a display device which enables semiconductor light emitting elements having a vertical structure to be assembled onto a substrate and then wiring process to be performed stably without any change to the position of the elements during post-processing.Type: ApplicationFiled: October 22, 2019Publication date: November 24, 2022Applicant: LG ELECTRONICS INC.Inventors: Dohan KIM, Jeonghyo KWON, Soohyun KIM, Indo CHUNG
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Publication number: 20220352446Abstract: The present specification provides a new type of a display device in which a wiring process is easily performed after a semiconductor light emitting element having a vertical structure is assembled on a substrate.Type: ApplicationFiled: August 30, 2019Publication date: November 3, 2022Applicant: LG ELECTRONICS INC.Inventors: Indo CHUNG, Jeonghyo KWON, Dohan KIM
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Publication number: 20220093809Abstract: Discussed is a method for manufacturing a solar cell including forming a lightly doped emitter region having a first sheet resistance at a first surface of a substrate, forming a dopant layer on the lightly doped emitter region, irradiating a laser beam onto the dopant layer to form a heavily doped emitter region having a second sheet resistance less than the first sheet resistance; forming a first finger electrode on the heavily doped emitter region in a first direction and forming a first bus bar electrode in a second direction to form a first electrode, and forming a second electrode on a second surface of the substrate, wherein the forming of the first bus bar electrode of the first electrode includes coating a bus bar paste including electrically conductive metal particles and a thermosetting resin and performing a predetermined temperature process on the bus bar paste.Type: ApplicationFiled: December 2, 2021Publication date: March 24, 2022Applicant: LG ELECTRONICS INC.Inventors: Jeongbeom NAM, Indo CHUNG, Ilhyoung JUNG, Jinah KIM
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Patent number: 11004994Abstract: Disclosed is a solar cell including a semiconductor substrate, a conductive area including a first conductive area and a second conductive area formed on one surface of the semiconductor substrate, a passivation film formed on the conductive area, the passivation film having a contact hole, a protective film formed on the conductive area inside the contact hole, the protective film being formed on at least one of at least a portion of an inner side surface of the contact hole and the passivation film, and an electrode electrically connected to the conductive area through the contact hole with the protective film interposed therebetween.Type: GrantFiled: May 13, 2016Date of Patent: May 11, 2021Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Juhong Yang, Eunjoo Lee, Mihee Heo
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Patent number: 10868210Abstract: Disclosed is a solar cell including a semiconductor substrate, a protective-film layer on a surface of the semiconductor substrate, a polycrystalline semiconductor layer over the protective-film layer, a first conductive area formed by selectively doping the semiconductor layer with a first conductive dopant, a second conductive area doped with a second conductive dopant and located between neighboring portions of the first conductive area, an undoped barrier area located between the first conductive area and the second conductive area, a first electrode connected to the first conductive area, and a second electrode connected to the second conductive area. Each of the first conductive area and the second conductive area includes a second crystalline area having a crystalline structure different from that of the barrier area, and the second crystalline areas of the first and second conductive areas include a second polycrystalline area and a fourth crystalline area having different depths.Type: GrantFiled: December 20, 2016Date of Patent: December 15, 2020Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Mihee Heo, Juhong Yang, Eunjoo Lee, Jeongbeom Nam
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Patent number: 10847663Abstract: A solar cell includes a semiconductor substrate; at least one conductive type region on the semiconductor substrate; a protective layer on the at least one conductive type region; and an electrode disposed on the protective layer and electrically connected to the conductive type region.Type: GrantFiled: January 28, 2015Date of Patent: November 24, 2020Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Seunghwan Shim, Ilhyoung Jung, Jeongbeom Nam
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Patent number: 10777694Abstract: A solar cell can include a semiconductor substrate; a tunneling layer formed over the semiconductor substrate; a conductive area located over the tunneling layer, the conductive area including a first conductive area of a first conductive type and a second conductive area of a second conductive type; and an electrode including a first electrode connected to the first conductive area and a second electrode connected to the second conductive area, wherein a mark is located in at least one of the first conductive area and the second conductive area, and has a different shape from that of a crystal plane of the semiconductor substrate and the conductive area, and wherein the mark is formed along a longitudinally extending edge of at least one of the first conductive area and the second conductive area.Type: GrantFiled: July 3, 2019Date of Patent: September 15, 2020Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Juhong Yang, Eunjoo Lee, Mihee Heo
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Patent number: 10720537Abstract: Discussed is a solar cell includes a semiconductor substrate, a conductive type region including a first conductive type region and a second conductive type region formed on one surface of the semiconductor substrate, an electrode including a first electrode and a second electrode, wherein the first electrode is connected to the first conductive type region and the second electrode is connected to the second conductive type region, and a passivation layer formed on the conductive type region. The passivation layer includes at least one of silicon nitride and silicon carbide.Type: GrantFiled: December 17, 2018Date of Patent: July 21, 2020Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Seunghwan Shim, Ilhyoung Jung, Jeongbeom Nam
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Patent number: 10566488Abstract: A solar cell and a method for manufacturing the same are disclosed. The solar cell includes a semiconductor substrate doped with impurities of a first conductive type, a front surface field region disposed at a front surface of the substrate and doped with impurities of the first conductive type at a concentration higher than those of the substrate, a tunnel layer disposed on a back surface of the substrate and formed of a dielectric material, an emitter region disposed at a first portion of a back surface of the tunnel layer and doped with impurities of a second conductive type opposite the first conductive type, and a back surface field region disposed at a second portion of the back surface of the tunnel layer and doped with impurities of the first conductive type at a concentration higher than those of the substrate.Type: GrantFiled: July 28, 2015Date of Patent: February 18, 2020Assignee: LG ELECTRONICS INC.Inventors: Seunghwan Shim, Ilhyoung Jung, Indo Chung, Eunhye Youn
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Publication number: 20190326457Abstract: A solar cell can include a semiconductor substrate; a tunneling layer formed over the semiconductor substrate; a conductive area located over the tunneling layer, the conductive area including a first conductive area of a first conductive type and a second conductive area of a second conductive type; and an electrode including a first electrode connected to the first conductive area and a second electrode connected to the second conductive area, wherein a mark is located in at least one of the first conductive area and the second conductive area, and has a different shape from that of a crystal plane of the semiconductor substrate and the conductive area, and wherein the mark is formed along a longitudinally extending edge of at least one of the first conductive area and the second conductive area.Type: ApplicationFiled: July 3, 2019Publication date: October 24, 2019Applicant: LG ELECTRONICS INC.Inventors: Indo CHUNG, Juhong YANG, Eunjoo LEE, Mihee HEO
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Patent number: 10388804Abstract: Disclosed is a method of manufacturing a solar cell, the method including forming a tunneling layer over one surface of a semiconductor substrate, forming a semiconductor layer over the tunneling layer, forming a conductive area including a first conductive area of a first conductive type and a second conductive area of a second conductive type in the semiconductor layer, and forming an electrode including a first electrode connected to the first conductive area and a second electrode connected to the second conductive area. The forming of the conductive area includes forming a mask layer over the semiconductor layer, forming a doping opening corresponding to at least one of the first conductive area and the second conductive area in the mask layer using a laser, and performing doping using the doping opening.Type: GrantFiled: May 27, 2016Date of Patent: August 20, 2019Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Juhong Yang, Eunjoo Lee, Mihee Heo
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Publication number: 20190115484Abstract: Discussed is a solar cell includes a semiconductor substrate, a conductive type region including a first conductive type region and a second conductive type region formed on one surface of the semiconductor substrate, an electrode including a first electrode and a second electrode, wherein the first electrode is connected to the first conductive type region and the second electrode is connected to the second conductive type region, and a passivation layer formed on the conductive type region. The passivation layer includes at least one of silicon nitride and silicon carbide.Type: ApplicationFiled: December 17, 2018Publication date: April 18, 2019Applicant: LG ELECTRONICS INC.Inventors: Indo CHUNG, Seunghwan SHIM, Ilhyoung JUNG, Jeongbeom NAM
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Patent number: 10181534Abstract: Discussed is a solar cell includes a semiconductor substrate, a conductive type region including a first conductive type region and a second conductive type region formed on one surface of the semiconductor substrate, an electrode including a first electrode and a second electrode, wherein the first electrode is connected to the first conductive type region and the second electrode is connected to the second conductive type region, and a passivation layer formed on the conductive type region. The passivation layer includes at least one of silicon nitride and silicon carbide.Type: GrantFiled: March 16, 2015Date of Patent: January 15, 2019Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Seunghwan Shim, Ilhyoung Jung, Jeongbeom Nam
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Patent number: 10147828Abstract: A solar cell includes a semiconductor substrate having a first conductivity type, an emitter layer on a surface of the semiconductor substrate, the emitter layer having a second conductivity type different from the first conductivity type, and electrodes including a first electrode electrically connected to the emitter layer, and a second electrode electrically connected to the semiconductor substrate. The emitter layer includes a high-concentration doping portion adjacent to the first electrode, and a low-concentration doping portion in a region that does not include the high-concentration doping portion. The low-concentration doping portion has a higher resistance than the high-concentration doping portion. The high-concentration doping portion includes a first region having a first resistance, and a second region having a second resistance higher than the first resistance.Type: GrantFiled: June 30, 2016Date of Patent: December 4, 2018Assignee: LG ELECTRONICS INC.Inventors: Indo Chung, Taehee Shin, Ilhyoung Jung, Jinah Kim
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Publication number: 20170236972Abstract: A method of manufacturing a solar cell is disclosed. The method includes forming a control passivation layer on a back surface of a semiconductor substrate containing impurities of a first conductivity type, forming an emitter region containing impurities of a second conductivity type opposite the first conductivity type and a back surface field region containing impurities of the first conductivity type on the control passivation layer, forming a passivation layer on the emitter region and the back surface field region, forming first and second openings in the passivation layer by using a pulse type laser having a continuously uniform intensity, forming a first electrode electrically and physically connected to the emitter region through the first opening, and forming a second electrode electrically and physically connected to the back surface field region through the second opening.Type: ApplicationFiled: February 10, 2017Publication date: August 17, 2017Applicant: LG ELECTRONICS INC.Inventors: Indo CHUNG, Jeongbeom NAM, Juhong YANG