Abstract: The present disclosure relates to a method and apparatus for performing sensor drift compensation based on double cycling measurement. A method for performing drift correction according to gas sensor measurement according to an embodiment of the present disclosure may comprise: obtaining first measurement data for a reference gas for each sensor using one or more sensors in a first cycle; obtaining second measurement data for a target gas for each sensor using the one or more sensors in a second cycle; and generating a drift-corrected feature for each sensor based on a ratio calculated by dividing the second measurement data by the first measurement data.

Abstract: The present disclosure relates to a vacuum blender, and more particularly, to a vacuum blender that may easily vacuum an external vacuum container in a state, in which a mixer container that accommodates foods is not separated from a body. The vacuum blender of the present disclosure may easily vacuum an auxiliary container by connecting a vacuum pump to an auxiliary container disposed on an outside of a body by using a container connector while not separating a mixer container that accommodates foods from the body.

Abstract: A biometric authentication apparatus is provided. The biometric authentication apparatus includes one or more converters that convert a transmit signal of an electrical signal into a vibration signal of a mechanical signal and transmit the vibration signal vibrating within a set frequency range to a user, one or more sensor that receive a biometric signal corresponding to the vibration signal from the user and convert the biometric signal into a receive signal of an electrical signal, an authentication module that extracts anatomical feature information of the user from the receive signal and determines whether the user is a registered user based on the anatomical feature information, and a memory that stores a database for the registered user. The biometric signal is a frequency-based signal modified to include the anatomical feature information while the vibration signal passes through at least a portion of the body of the user.

Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.

Abstract: Provided is a multi-port gas flow rate control apparatus. The multi-port gas flow rate control apparatus includes a gas supply chamber configured to supply a measurement gas input through one gas inflow channel while allowing the measurement gas to diverge into a plurality of flows, a plurality of gas divergence flow channels each having one side connected to the gas supply chamber and configured to transfer the measurement gas flowing through the gas supply chamber to a plurality of gas sensors, respectively, and a gas measurement chamber configured to accommodate the plurality of gas sensors, including the plurality of gas divergence flow channels configured to connect to the gas supply chamber to the plurality of gas sensors to transfer a gas outflow diverging through the gas supply chamber to the plurality of accommodated gas sensors, and configured to discharge the gas outflow sensed by the plurality of gas sensors.

Abstract: Disclosed is a silicon photonics package including an interposer including embedded optical components; a light source element optically connected to the optical components; a first semiconductor chip on a top surface of the interposer; a first redistribution layer on a bottom surface of the interposer; a second semiconductor chip on the first redistribution layer; a second redistribution layer on the first redistribution layer and being electrically connected to the first redistribution layer; conductive metal posts provided between the first and second redistribution layers; a mold material filling a space between the first and second redistribution layers; and a solder bump array on a bottom surface of the second redistribution layer. The top surface of the interposer includes an exposure area to which an optical fiber array is directly attached, in which an optical signal is directly transmitted between the optical components and the optical fiber array through the exposure area.

Abstract: A semiconductor device includes a low-density substrate, a high-density patch positioned inside a cavity in the low-density substrate, a first semiconductor die, and a second semiconductor die. The first semiconductor dies includes high-density bumps and low-density bumps. The second semiconductor die includes high-density bumps and low-density bumps. The high-density bumps of the first semiconductor die and the high-density bumps of the second semiconductor die are electrically connected to the high-density patch. The low-density bumps of the first semiconductor die and the low-density bumps of the second semiconductor die are electrically connected to the low-density substrate.

Abstract: A semiconductor package comprises a first semiconductor chip and a second semiconductor chip. The first semiconductor chip includes a first substrate, a first semiconductor device layer disposed on the first substrate, a first chip wiring layer disposed on the first semiconductor device layer, and a first bonding pad directly connected to the first chip wiring layer and that includes a first dishing formed thereon. The second semiconductor chip includes a second substrate, a first through-via that penetrates through the second substrate, and a second bonding pad directly connected to the first through-via and that includes a second dishing formed thereon. The first semiconductor chip and the second semiconductor chip are bonded to each other and the first bonding pad and the second bonding pad face each other, and a gold bonding layer fills the first dishing of the first bonding pad and the second dishing of the second bonding pad.

Abstract: A semiconductor package includes; a semiconductor substrate including a device region and an edge region, a first redistribution layer on a lower surface of the semiconductor substrate, a second redistribution layer on an upper surface of the semiconductor substrate, through vias vertically penetrating the semiconductor substrate in the edge region to electrically connect the first redistribution layer and the second redistribution layer, and a circuit layer between the lower surface of the semiconductor substrate and the first redistribution layer. The circuit layer may include; a circuit element on the lower surface of the semiconductor substrate, a circuit wiring pattern electrically connected to the circuit element and the first redistribution layer, and a device interlayer dielectric layer substantially encompassing the circuit element and the circuit wiring pattern, wherein the circuit element and the circuit wiring pattern are disposed in the device region and not in the edge region.

Abstract: A vacuum blender having a foreign body catching member mounted thereon, the foreign body catching member disposed outside a container cover such that one end is communicatably coupled to a discharge hole formed in the container cover, and the other end is communicatably coupled to a communication path enabling a vacuum pump to communicate with the container cover. When the vacuum pump is operated in a state where the two ends of the foreign body catching member are communicating with the discharge hole and the communication path, respectively, air inside a crushing container is discharged to the outside by passing through the vacuum pump via the discharge hole, the foreign body catching member, and the communication path, and, by means of moving relative to the container cover, the foreign body catching member disposed outside the container cover has the one end communicate with or be blocked from the discharge hole.

Abstract: A semiconductor package includes a package substrate, an interposer substrate on the package substrate, first connection bumps between the package substrate and the interposer substrate, first and second semiconductor chips on the interposer substrate, second connection bumps between the interposer substrate and the first and second semiconductor chips, and an upper molding layer on the interposer substrate and at least partially surrounding the first semiconductor chip and the second semiconductor chip. The interposer substrate includes a plurality of sub-interposers horizontally spaced apart from each other and each including through electrodes, a lower molding layer in a space between the sub-interposers, and a redistribution layer electrically connected to the through electrodes on the sub-interposers and the lower molding layer. A sum of areas of the sub-interposers is less than a sum of areas of the first and second semiconductor chips.

Abstract: A semiconductor package includes a first semiconductor chip having a first top surface and an opposite first bottom surface, first pads on the first top surface, each having a first width and a first height, second pads on the first top surface further outward from a center of the first semiconductor chip, each having a second width less than the first width and a second height greater than the first height. The semiconductor package further includes a second semiconductor chip having a second bottom surface which faces the first top surface and an opposite second top surface, third pads on the second bottom surface which are connected to the first pads, and fourth pads on the second bottom surface which are connected to the second pads. The second bottom surface is convex.

Abstract: A fabricating method for a test element group is provided. The fabricating method for a test element group includes fabricating test areas generated in a scribe lane area, wherein fabricating of the test areas includes forming a plurality of fins protruding in a first direction on a substrate, covering at least some of the plurality of fins with a masking material, and performing selective epitaxial growth by injecting a gas onto the plurality of fins. The gas is not injected onto the at least some of the plurality of fins that are covered with the masking material, such that the epitaxial growth does not occur on the fins covered with the masking material.

Abstract: A semiconductor package includes a first lower redistribution layer, a first upper redistribution layer over the first lower redistribution layer, a first semiconductor chip between the first lower redistribution layer and the first upper redistribution layer, a first connection post spaced apart from the first semiconductor chip and connecting the first lower redistribution layer to the first upper redistribution layer, a first interposition layer on the first upper redistribution layer, a second interposition layer on the first interposition layer, a second lower redistribution layer on the second interposition layer, a second upper redistribution layer over the second lower redistribution layer, a second semiconductor chip between the second lower redistribution layer and the second upper redistribution layer, and a second connection post spaced apart from each other and connecting the second lower redistribution layer to the second upper redistribution layer.

Abstract: The present disclosure relates to an electronic circuit. A circuit board according to the present disclosure includes a first conductor layer including a first pad for transmitting and receiving a first signal to and from an external device, a plurality of second conductor layers stacked on the first conductor layer, and a third conductor layer stacked on the plurality of second conductor layers for transmitting and receiving a second signal to and from the external device, wherein at least one target conductor layer among the plurality of second conductor layers has a mesh structure and is electrically grounded, and remaining second conductor layers except for the at least one target conductor layer include respective voids and are electrically opened.

Abstract: Provided is a personal authentication device based on an auditory brainstem response signal. The personal authentication device includes a signal generator, a signal acquirer, and a signal processor. The signal generator may output an auditory stimulus to an ear of a user, using a sound generator. The signal acquirer may acquire a first reference potential corresponding to a first interval, from a first electrode in close contact with the other ear of the user, and acquire a first evoked potential corresponding to the first interval from a second electrode in close contact with the ear, based on the first reference potential. The signal processor may generate a first auditory brainstem response signal, based on the first reference potential and the first evoked potential, generate authentication data for the user from the first auditory brainstem response signal, and compare the authentication data with registration data to authenticate the user.

Abstract: A device for automated loading and forming smoking articles has a pre-rolled cone holder holding a plurality of pre-rolled cones. A loading mechanism loads individual pre-rolled cones in the pre-rolled cone holder with a predefined amount of material. A filling mechanism deposits the predefined amount of material in the loading mechanism, the filling mechanism monitoring an amount of material loaded in the filling mechanism and sending a signal to stop loading the filling mechanism with the material when a predefined amount has been loaded. A dispensing mechanism sends the material to the filling mechanism. A hopper is in communication with the dispensing mechanism storing the material. A shaker is coupled to the hopper shaking the material in the hopper preventing the material from sticking together.

Abstract: Disclosed are a gas detection intelligence training system and an operating method thereof. The gas detection intelligence training system includes a mixing gas measuring device that collects an environmental gas from a surrounding environment, generates a mixing gas based on the collected environmental gas and a target gas, senses the mixing gas by using a first sensor array and a second sensor array under a first sensing condition and a second sensing condition, respectively, and generates measurement data based on the sensed results of the first sensor array and the second sensor array, and a detection intelligence training device including a processor that generates an ensemble prediction model based on the measurement data.

Abstract: Provided is a multi-port gas flow rate control apparatus. The multi-port gas flow rate control apparatus includes a gas supply chamber configured to supply a measurement gas input through one gas inflow channel while allowing the measurement gas to diverge into a plurality of flows, a plurality of gas divergence flow channels each having one side connected to the gas supply chamber and configured to transfer the measurement gas flowing through the gas supply chamber to a plurality of gas sensors, respectively, and a gas measurement chamber configured to accommodate the plurality of gas sensors, including the plurality of gas divergence flow channels configured to connect to the gas supply chamber to the plurality of gas sensors to transfer a gas outflow diverging through the gas supply chamber to the plurality of accommodated gas sensors, and configured to discharge the gas outflow sensed by the plurality of gas sensors.

Abstract: Disclosed are semiconductor packages and their fabrication methods. The semiconductor package comprises a package substrate, a redistribution layer on the package substrate, a vertical connection terminals that connects the package substrate to the redistribution layer, a first semiconductor chip between the package substrate and the redistribution layer, a first molding layer that fills a space between the package substrate and the redistribution layer, a second semiconductor chip on the redistribution layer, a third semiconductor chip on the second semiconductor chip, a first connection wire that directly and vertically connects the redistribution layer to a first chip pad of the third semiconductor chip, the first chip pad is beside the second semiconductor chip and on a bottom surface of the third semiconductor chip, and a second molding layer on the redistribution layer and covering the second semiconductor chip and the third semiconductor chip.