Patents by Inventor Ingo Brasack

Ingo Brasack has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080311283
    Abstract: An auxiliary layer is provided over a main surface of a sample, wherein the sample may be a semiconductor substrate. The auxiliary layer may have an essentially plane surface and is transparent or semi-transparent to an inspection radiation with a wave length between, for example, 193 and 800 nm. The sample coated with the auxiliary layer is inspected for defects in the sample via an imaging method that may use coherent radiation. After inspection, the auxiliary layer is removed. Dependent on the defect count, a process of manufacturing integrated circuits may be continued or the sample may be reworked or discarded.
    Type: Application
    Filed: June 15, 2007
    Publication date: December 18, 2008
    Applicant: QIMONDA AG
    Inventors: Ingo Brasack, Michael Goldberg, Kerstin Muehlstaedt
  • Patent number: 6944573
    Abstract: For the analysis of scratches on semiconductor wafers, the semiconductor wafer surface is detected and a possible scratch position or a scratch course on the semiconductor surface is determined, in which case a parameter value identifying the scratch is determined from the scratch position and the scratch course and this parameter value that has been determined is correlated with comparison parameter values, which identify installation-specific scratch positions and scratch courses, in order to determine an installation causing the scratch.
    Type: Grant
    Filed: December 18, 2003
    Date of Patent: September 13, 2005
    Assignee: Infineon Technologies AG
    Inventors: Ingo Brasack, Marco Beckmann
  • Publication number: 20040220754
    Abstract: For the analysis of scratches on semiconductor wafers, the semiconductor wafer surface is detected and a possible scratch position or a scratch course on the semiconductor surface is determined, in which case a parameter value identifying the scratch is determined from the scratch position and the scratch course and this parameter value that has been determined is correlated with comparison parameter values, which identify installation-specific scratch positions and scratch courses, in order to determine an installation causing the scratch.
    Type: Application
    Filed: December 18, 2003
    Publication date: November 4, 2004
    Inventors: Ingo Brasack, Marco Beckmann