Abstract: A method is disclosed for electrically bonding a first semiconductor component to a second semiconductor component, both components including arrays of contact areas. In one aspect, prior to bonding, layers of an intermetallic compound are formed on the contact areas of the second component. The roughness of the intermetallic layers is such that the intermetallic layers include cavities suitable for insertion of a solder material in the cavities, under the application of a bonding pressure, when the solder is at a temperature below its melting temperature. The components are aligned and bonded, while the solder material is applied between the two. Bonding takes place at a temperature below the melting temperature of the solder. The bond can be established only by the insertion of the solder into the cavities of the intermetallic layers, and without the formation of a second intermetallic layer.

Abstract: A method is disclosed for electrically bonding a first semiconductor component to a second semiconductor component, both components including arrays of contact areas. In one aspect, prior to bonding, layers of an intermetallic compound are formed on the contact areas of the second component. The roughness of the intermetallic layers is such that the intermetallic layers include cavities suitable for insertion of a solder material in the cavities, under the application of a bonding pressure, when the solder is at a temperature below its melting temperature. The components are aligned and bonded, while the solder material is applied between the two. Bonding takes place at a temperature below the melting temperature of the solder. The bond can be established only by the insertion of the solder into the cavities of the intermetallic layers, and without the formation of a second intermetallic layer.

Abstract: The disclosed technology generally relates to semiconductor characterization, and more particularly to detecting manufacturing defects in semiconductor regions. In one aspect, a non-destructive method of detecting a manufacturing defect in a semiconductor device includes providing a semiconductor device comprising an electrically isolated conductive via formed in a semiconductor region. The method additionally includes locally heating to cause a temperature change in a volume of the semiconductor region from a first temperature to a second temperature. The method additionally includes applying an electrical bias between the conductive via and the semiconductor region to form a temperature-dependent depletion region in the semiconductor region.

Abstract: The disclosed technology generally relates to semiconductor characterization, and more particularly to detecting manufacturing defects in semiconductor regions. In one aspect, a non-destructive method of detecting a manufacturing defect in a semiconductor device includes providing a semiconductor device comprising an electrically isolated conductive via formed in a semiconductor region. The method additionally includes locally heating to cause a temperature change in a volume of the semiconductor region from a first temperature to a second temperature. The method additionally includes applying an electrical bias between the conductive via and the semiconductor region to form a temperature-dependent depletion region in the semiconductor region.

Abstract: Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force.

Abstract: Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force.

Abstract: Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force.

Abstract: Devices and methods for producing an integrated circuit device, comprising a front-end-of-line (FEOL) portion and a back-end-of-line (BEOL) portion, are disclosed. The metallization layers comprise dielectric layers, preferably low-k dielectric layers, with metal conductors and/or interconnect structures incorporated within the dielectric layers. In an exemplary device, in at least some of the metallization layers of the BEOL stack, the elastic modulus of the dielectric material varies from one area of the layer to one or more other areas of the layer. In some implementations, a mask layer is applied on the BEOL stack or on one of the metallization layers during fabrication of the stack, the mask layer covering portions of the stack area and exposing other portions of the area. Then, a treatment is performed that changes the elastic modulus of the dielectric material in one or more of the metallization layers, but only in areas uncovered by the mask layer.

Abstract: A method for inspection of a semiconductor device is disclosed. In one aspect, the method includes performing a processing step in manufacturing of the semiconductor device, wherein a compound is at least in contact with the semiconductor device. The method also includes capturing an image on a two-dimensional image sensor of an area of at least part of the semiconductor device, wherein the captured image comprises spectral information for a plurality of positions in the area, and wherein the spectral information comprises intensity of incident electro-magnetic radiation for a plurality of different wavelength bands across a spectrum of wavelengths. The method also includes processing the spectral information of the captured image for each of the plurality of positions to determine whether residue of the compound is present in the position.

Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.

Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.

Abstract: Alignment of a first micro-electronic component to a receiving surface of a second micro-electronic component is realized by a capillary force-induced self-alignment, combined with an electrostatic alignment. The latter is accomplished by providing at least one first electrical conductor line along the periphery of the first component, and at least one second electrical conductor along the periphery of the location on the receiving surface of the second component onto which the component is to be placed. The contact areas surrounded by the conductor lines are covered with a wetting layer. The electrical conductor lines may be embedded in a strip of anti-wetting material that runs along the peripheries to create a wettability contrast. The wettability contrast helps to maintain a drop of alignment liquid between the contact areas so as to obtain self-alignment by capillary force.

Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.

Abstract: Controlled amount of heat is injected into a stacked die using a light beam, and the propagated heat is measuring with LIT camera from the other side of the die. The thermal image obtained can be characterized so that it can be used to calibrate the phase shift from a given stack layer, or can be used to identify defects in the stacked die. The process can be repeated for each die in the stack to generate a reference for future testing. The thermal image can be investigated to detect faults, such as voids in vias, e.g., TSV.

Abstract: An electrostatically actuatable micro electromechanical device is provided with enhanced reliability and lifetime. The electrostatically actuatable micro electromechanical device comprises: a substrate, a first conductor fixed to the top layer of the substrate, forming a fixed electrode, a second conductor fixed to the top layer of the substrate, and a substrate area. The second conductor is electrically isolated from the first conductor and comprises a moveable portion, suspended at a predetermined distance above the first conductor, the moveable portion forming a moveable electrode which approaches the fixed electrode upon applying an actuation voltage between the first and second conductors. The selected substrate surface area is defined as the orthogonal projection of the moveable portion on the substrate between the first and second conductors. In the substrate surface area at least one recess is provided in at least the top layer of the substrate.

Abstract: An electrostatically actuatable micro electromechanical device is provided with enhanced reliability and lifetime. The electrostatically actuatable micro electromechanical device comprises: a substrate, a first conductor fixed to the top layer of the substrate, forming a fixed electrode, a second conductor fixed to the top layer of the substrate, and a substrate area. The second conductor is electrically isolated from the first conductor and comprises a moveable portion, suspended at a predetermined distance above the first conductor, the moveable portion forming a moveable electrode which approaches the fixed electrode upon applying an actuation voltage between the first and second conductors. The selected substrate surface area is defined as the orthogonal projection of the moveable portion on the substrate between the first and second conductors. In the substrate surface area at least one recess is provided in at least the top layer of the substrate.

Abstract: To provide a semiconductor device configured that a micro device having a device substrate, a function element provided on the device substrate and having an oscillator or a movable part, first lands provided on a surface of the device substrate by being arranged on its outer circumference portion of the function element, and bumps provided to the first lands is mounted on the circuit board having second lands formed to correspond to the bumps, from the bump formation surface side, so that the bumps and the second lands are electrically connected; on which a sealing resin layer is formed to go round the outer circumference portion of the function element to fix connection portions of the bumps and the second lands, and to seal a clearance between the device substrate and the circuit board; and a cavity portion is formed between the function element and the circuit board.

Abstract: A photon-emission microscope method and system are described which allow both emission spot localization and continuous spectral analysis of the emited light from the emission spot of a biased electronic circuit. The system includes an emission microscope, a detector and an in-line, direct vision, chromatically dispersing prismatic device. The microscope system advantageously uses only one detector which does not need to be moved to be able to detect both the localization and spectral images. In a particular embodiment, localization of emission spots may be performed using monochromatic light which allows sharp images of the electronic circuit despite the fact that the electronic circuit is viewed through the dispersing device. Further, an improved procedure is described for overcoming errors caused by saturation of the detector at high sensitivities.