Patents by Inventor Ingrid J. Voors

Ingrid J. Voors has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 4885259
    Abstract: A method of manufacturing a semiconductor device comprising a field effect transistor having an insulated gate electrode (11) of doped polycrystalline silicon, which is provided on a surface (5) of a semiconductor substrate (1), in which further source and drain zones (17, 18) of the transistor are formed. The source and drain zones (17, 18) and the gate electrode (11) are provided in a self-registered manner with a top layer of a metal silicide (27). According to the invention, during the formation of the gate electrode (11) in a layer of polycrystalline silicon (7), an etching mask (10) containing silicon nitride is used. Thus, without the gate oxide (6) lying under the layer of polycrystalline silicon (7) being covered with organic residues that can be removed only with difficulty, a gate electrode (11) can be otained with side edges (12) directed transversely to the surface (5).
    Type: Grant
    Filed: December 28, 1988
    Date of Patent: December 5, 1989
    Assignee: U.S. Philips Corporation
    Inventors: Kazimierz Osinski, Ingrid J. Voors