Abstract: Apparatus and method for warm reset customization on firmware failures. For example, one embodiment of a graphics processor comprises: graphics processing circuitry process instructions (e.g., graphics and/or compute instructions); and a reset microcontroller coupled to the graphics processing circuitry, the reset microcontroller, in response to a triggering event, to load a clean firmware image in a known valid state, wherein the clean firmware image, following loading, is to be used to boot the graphics processor to an operational state.

Abstract: Techniques for intra-bin processor differentiation.

Abstract: It is provided a non-transitory computer-readable medium storing instructions that, when executed by one or more processing circuitries of an apparatus, causing the one or more processing circuitries to perform locally on the apparatus a method. The method includes receiving configuration inputs for a target semiconductor device, the configuration inputs comprising a device identifier, one or more safety-critical parameters, and profile-specific operational parameters for one or more semiconductor device configuration profiles. The method further includes generating a first set of configuration data for programming into a non-volatile one-time programmable memory of the target semiconductor device. The method further includes generating a second set of configuration data for a non-volatile rewritable memory of the target semiconductor device.

Abstract: It is provided a non-transitory computer-readable medium storing instructions that, when executed by a processing circuitry of an apparatus, causing the processing circuitry to perform locally on the apparatus a method. The method includes transmitting, to a boot controller of the computing system, a request to initiate a single-block transfer of full configuration data corresponding to the firmware of the component. The request comprises a destination address within a local memory of the component and a size of the configuration data. The method further includes receiving, from the boot controller, an acknowledgement indicating that the full configuration data has been loaded as a single block into the local memory at the destination address. The method further includes in response to the acknowledgement, parsing the single block of the full configuration data residing in the local memory to apply one or more configuration settings for the component.

Abstract: Some aspects of the present disclosure relate to a power management apparatus for a memory subsystem of a graphics processing unit, the power management apparatus comprising first interface circuitry for communicating with a system firmware of a host computer hosting the graphics processing unit, second interface circuitry for communicating with one or more components of the memory subsystem of the graphics processing unit, processor circuitry configured to obtain a memory subsystem control input from the system firmware, trigger execution of a sequence of operations in response to the memory subsystem control input, and provide a memory subsystem control output to the system firmware based on a result of the sequence of operations.

Abstract: It is provided an apparatus comprising interface circuitry configured to communicate with one or more memory controllers. The apparatus further comprises machine-readable instructions, and processing circuitry to execute the machine-readable instructions. The machine-readable instructions include instructions to receive a request from a management component to initiate collection of telemetry data from one or more memory devices. The machine-readable instructions further include instructions to, in response to the request, send a command to the one or more memory controllers to cause the at least one memory controller to read the telemetry data from one or more memory devices. The machine-readable instructions further include instructions to receive the telemetry data from the at least one memory controller, to stage the telemetry data, and to send an acknowledgement to the management component.

Abstract: Provided is an apparatus, a device, a method, a computer program, and a non-transitory, computer-readable medium comprising a program code for a computer system, as well as a computer system. An apparatus (10) for a computer system (100) comprises memory circuitry (11) for storing information identifying at least one defective memory hardware location, and one or more hardware address determination circuitries (12, 13) configured to determine a mapping between a physical memory address and a hardware location address of corresponding memory (101, 102), wherein the one or more hardware address determination circuitries are configured to adapt the mapping at run-time upon obtaining updated information identifying at least one defective memory hardware location.

Abstract: In some embodiments, the disclosed subject matter is an assistance system with a wearable assistive device that mitigates the effects of neuro-muscular ailments such as unintended motion, or loss of strength. The assistance system uses predictive analysis based on situational, operational, and historical contexts, when in active/predictive mode. When in reactive triode, the assistive device mitigates unintended motion without altering the strength of the user. The assistance system may have an exercise mode to both assess the user's strength and flexibility of various muscles and joints, and promote exercises to either avoid further losses, or to maintain current strength and flexibility. The assistance system utilizes sensor data from sensors coupled to the assistive device, and optionally from sensors coupled to mobile devices and in the environment. Actuators on the assistive device control movement of the device based on inferred intended actions or reactive to unintended movement.