Patents by Inventor In-Hwan Park

In-Hwan Park has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240145790
    Abstract: A button-type secondary battery includes a lower can having a bottom surface; an upper can having a top, the upper can and the lower can being coupled to define a space therein; an electrolyte in the space; an electrode assembly in the space and including a negative electrode, a separator, and a positive electrode wound together; a gasket between the upper can and the lower can to electrically insulate the upper and lower cans; a top insulator that is electrically insulating and covering a top surface of the electrode assembly; and a bottom insulator that is electrically insulating and covering a bottom surface of the electrode assembly. The top and bottom insulators are each configured to expand in volume by absorbing the electrolyte. Surfaces of at least one of the top insulator and the bottom insulator are coated with a protective layer to prevent thermal shrinkage from occurring.
    Type: Application
    Filed: October 14, 2022
    Publication date: May 2, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Yeong Hun JUNG, Young Ji TAE, Joo Hwan SUNG, Min Su CHO, Geun Young PARK, Min Gyu KIM, Min Seon KIM, Sang Hak CHAE, Min Young JU
  • Publication number: 20240147098
    Abstract: A color matching circuit of an image sensor includes a receiving end configured to receive an analog pixel signal. The color matching circuit also includes a path controller including a first switch set configured to control current paths between a common node coupled to the receiving end and power sources and a second switch set configured to control signal paths between the common node and analog-to-digital converters, the path controller being configured to determine on-off states of switches included in the first switch set and the second switch set based on a color corresponding to the analog pixel signal. The path controller transfers the analog pixel signal to a target analog-to-digital converter determined depending on the on-off states of the switches, among the analog-to-digital converters.
    Type: Application
    Filed: March 22, 2023
    Publication date: May 2, 2024
    Applicant: SK hynix Inc.
    Inventors: Han Sol PARK, Yu Jin PARK, Soo Hwan KIM, Seung Hwan LEE, Ji Ho LEE
  • Publication number: 20240145437
    Abstract: A semiconductor package includes a package substrate, a plurality of semiconductor devices stacked on the package substrate, a plurality of underfill fillets disposed between the plurality of semiconductor devices and between the package substrate and the plurality of semiconductor devices, and a molding resin at least partially surrounding the plurality of semiconductor devices and the plurality of underfill fillets. The plurality of underfill fillets include a plurality of protrusions that protrude from spaces between each of the plurality of semiconductor devices or between the package substrate and each of the plurality of semiconductor devices. At least two neighboring underfill fillet protrusions of the plurality of protrusions form one continuous structure without an interface therebetween.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 2, 2024
    Inventors: JI-HWAN HWANG, SANG-SICK PARK, TAE-HONG MIN, GEOL NAM
  • Publication number: 20240146329
    Abstract: Disclosed is an interface circuit including a first parallel-to-serial conversion circuit suitable for converting inverted parallel data in a parallel-to-serial manner to generate first output data in a test mode; a second parallel-to-serial conversion circuit suitable for converting non-inverted parallel data in the parallel-to-serial manner to generate second output data in the test mode; a third parallel-to-serial conversion circuit suitable for converting the non-inverted parallel data in the parallel-to-serial manner to generate third output data in the test mode; a fourth parallel-to-serial conversion circuit suitable for converting the inverted parallel data in the parallel-to-serial manner to generate fourth output data in the test mode; a first driver circuit suitable for receiving the first and second output data in the test mode; and a second driver circuit suitable for receiving the third and fourth output data in the test mode.
    Type: Application
    Filed: March 15, 2023
    Publication date: May 2, 2024
    Inventors: Eun Ju CHOE, Ho Young PARK, Jong Hwan CHOI
  • Publication number: 20240142638
    Abstract: A vehicle location analysis method according to one embodiment of the present invention is a method of analyzing a location of a vehicle in a navigation device, wherein method includes: collecting, by a driving information collection unit, driving information of the vehicle through an on board diagnosis (OBD) scanner of the vehicle; collecting, by a terrain information collection unit, terrain information with respect to topographic features located around the vehicle; analyzing, by a vehicle location analysis unit, a location of the vehicle based on the driving information and the terrain information, when the terrain information is collected; and correcting, by the vehicle location analysis unit, the location of the vehicle when driving on a road bump or a floor movement section of a parking lot among the topographic features.
    Type: Application
    Filed: January 11, 2024
    Publication date: May 2, 2024
    Inventor: Ju Hwan PARK
  • Publication number: 20240145851
    Abstract: A battery assembly effectively improves safety by suppressing propagation of a thermal event. A battery assembly according to an aspect includes a plurality of battery cells and a venting unit located between adjacent battery cells of the plurality of battery cells, including a venting passage through, and configured to discharge venting gas discharged from the plurality of battery cells.
    Type: Application
    Filed: December 12, 2022
    Publication date: May 2, 2024
    Applicant: LG ENERGY SOLUTION, LTD.
    Inventors: Sung-Hwan JANG, Jun-Yeob SEONG, Myung-Ki PARK
  • Publication number: 20240140822
    Abstract: A water purifier is provided. A water purifier according to one aspect of the present invention may include a housing having a first accommodation space therein, and made of a paper material; a water purifier faucet disposed in the first accommodation space to receive raw water and discharge purified water; and a filter coupled to the water purifier faucet to generate the purified water by filtering the raw water, wherein the water purifier faucet includes a base frame having a second accommodation space therein in which the filter is accommodated; a water inlet module provided on one side of the base frame to supply raw water introduced from the outside to the filter; and a water outlet module provided on the other side of the base frame to receive the purified water generated by the filter and discharge it to the outside.
    Type: Application
    Filed: October 27, 2023
    Publication date: May 2, 2024
    Applicant: COWAY Co., Ltd.
    Inventors: Eui Hwan LEE, Chan Jung PARK, Jun HER, Myeong Hoon KANG, Gyeong Cheol SIN, Sang Gu SIM
  • Publication number: 20240144871
    Abstract: A display device, includes: a display area and a non-display area; a plurality of signal lines over the display area; and a plurality of connection lines in the display area and connected to the signal lines, wherein the plurality of connection lines includes a plurality of first connection lines connected to the signal lines, respectively, a plurality of third connection lines on a same layer as the first connection lines, and a plurality of second connection lines connecting the first connection lines to the third connection lines.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Inventors: Seung Hwan CHO, Jong Hyun CHOI, Ju Chan PARK, Seung Min SONG, Min Seong YI
  • Publication number: 20240140798
    Abstract: Provided is a method for preparing silicon nitride powder for manufacturing a substrate. The method for preparing silicon nitride powder for manufacturing a substrate, according to an embodiment of the present invention, comprises the steps of: preparing mixed raw material powder comprising metallic silicon powder and crystalline phase control powder; preparing the mixed raw material powder into granules having a predetermined particle size; nitrifying the granules at a predetermined temperature ranging from 1,200-1,500° C. while nitrogen gas is applied to the granules at a predetermined pressure; and pulverizing the nitrified granules. According to the method, it is easy to realize powder having an ? crystal phase at a desired level, and when this is realized as a substrate, a substrate having compact density can be manufactured.
    Type: Application
    Filed: March 18, 2022
    Publication date: May 2, 2024
    Inventors: Kyu Hwan PARK, Hun CHEONG
  • Publication number: 20240139436
    Abstract: A method of controlling injection of a drug includes receiving a captured medical image of an object, identifying an object of interest from the medical image, based on a position and a shape of the object of interest, determining a drug injection position, based on the position and the shape of the object of interest, determining a plurality of electrode insertion positions, the plurality of electrodes being configured to supply a current to move the drug, defining a drug movement path based on a shape of the identified object of interest, generating current sequence information to move the drug along the drug movement path, the current sequence information defining a current applied over time to each of the plurality of electrodes, and outputting the current sequence information to a current source apparatus.
    Type: Application
    Filed: October 30, 2023
    Publication date: May 2, 2024
    Applicants: SEOUL NATIONAL UNIVERSITY R&DB FOUNDATION, UIF (UNIVERSITY INDUSTRY FOUNDATION), YONSEI UNIVERSITY, IUCF-HYU (Industry-University Cooperation Foundation Hanyang University)
    Inventors: Young Bin Choy, Han Bi Ji, Chang Hee Min, Jae Hoon Han, Won Seok Chang, Jun Won Park, Chang-Hwan Im, Kyeong-Gu Lee
  • Publication number: 20240140944
    Abstract: The present invention relates to a novel naphthyridinone derivative compound, a pharmaceutically acceptable salt thereof, a hydrate thereof, or a stereoisomer thereof, which are each relevant to a compound for inhibiting ENPP1, a composition for inhibiting ENPP1, and a method for inhibiting ENPP1.
    Type: Application
    Filed: December 29, 2021
    Publication date: May 2, 2024
    Applicant: TXINNO BIOSCIENCE INC.
    Inventors: Seo Jung Han, Chan Sun Park, Sung Joon Kim, Jae Eun Cheong, Jung Hwan Choi, Ali Imran, Sun Woo Lee, Yong Yea Park, Ah Ran Yu, Sun Young Park
  • Publication number: 20240145268
    Abstract: A molding apparatus for fabricating a semiconductor package includes an upper mold including an upper cavity, a first side cavity at a first side of the upper cavity, a second side cavity formed at an opposite second side of the upper cavity, and a first driving part connected to the first side cavity and configured to move the first side cavity in a first direction, and a bottom mold including a bottom cavity configured to receive a molding target including a package substrate and at least one semiconductor chip. A width in the first direction between the first side cavity and the second side cavity may be smaller than a width of the package substrate in the first direction and greater than a width in the first direction between a first boundary and a second boundary of the at least one semiconductor chip.
    Type: Application
    Filed: September 15, 2023
    Publication date: May 2, 2024
    Inventors: Jun Woo Park, Gyu Hyeong Kim, Seung Hwan Kim, Jung Joo Kim, Jong Wan Kim, Yong Kwan Lee
  • Publication number: 20240145346
    Abstract: A semiconductor device includes a substrate with a conductive pattern. A semiconductor die is electrically connected to the substrate and both the semiconductor die and the substrate are at least partially covered by a package body. In some examples, through-mold vias are formed in the package body to provide electrical signal paths from an exterior surface thereof to the conductive pattern of the substrate. In some examples, through-mold vias are included in the package body to provide electrical signal paths between the semiconductor die and an exterior surface of the package body. In some examples, an interposer is electrically connected to the through-mold vias and may be covered by the package body and/or disposed in spaced relation thereto. In some examples, the interposer may not be electrically connected to the through-mold vias but may have one or more semiconductor dies of the semiconductor device electrically connected thereto.
    Type: Application
    Filed: January 8, 2024
    Publication date: May 2, 2024
    Applicant: Amkor Technology Singapore Holding Pte. Ltd
    Inventors: Dong Joo PARK, Jin Seong KIM, Ki Wook LEE, Dae Byoung KANG, Ho CHOI, Kwang Ho KIM, Jae Dong KIM, Yeon Soo JUNG, Sung Hwan CHO
  • Patent number: 11971500
    Abstract: In an aspect, a radar controller determines a radar slot format that configures transmission of a reference radar signal on a first symbol over a first link from a first base station to a second base station followed by at least one target radar signal on at least one second symbol over at least one second link from the first base station to the second base station, and transmits an indication of the radar slot format to the first base station and the second base station. The first base station transmits, and the second base station receives, the reference radar signal and the at least one target radar signal in accordance with the radar slot format.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: April 30, 2024
    Assignee: QUALCOMM INCORPORATED
    Inventors: Weimin Duan, Alexandros Manolakos, Seyong Park, Renqiu Wang, Hwan Joon Kwon, Krishna Kiran Mukkavilli, Taesang Yoo
  • Patent number: 11973106
    Abstract: A semiconductor device includes a lower electrode; a supporter supporting an outer wall of the lower electrode; a dielectric layer formed on the lower electrode and the supporter; an upper electrode on the dielectric layer; a first interfacial layer disposed between the lower electrode and the dielectric layer and selectively formed on a surface of the lower electrode among the lower electrode and the supporter; and a second interfacial layer disposed between the dielectric layer and the upper electrode, wherein the first interfacial layer is a stack of a metal oxide contacting the lower electrode and a metal nitride contacting the dielectric layer.
    Type: Grant
    Filed: July 5, 2022
    Date of Patent: April 30, 2024
    Assignee: SK hynix Inc.
    Inventors: Jae Hee Song, Dong Hyun Lee, Kyung Woong Park, Cheol Hwan Park, Ki Vin Im
  • Patent number: 11972939
    Abstract: The inventive concept provides a method for treating a substrate. The method includes removing a film on the substrate by applying a pulsed laser to the rotating substrate, in which thickness of the film to be removed is measured and pulse energy of the pulsed laser is selected based on the measured thickness of the film.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: April 30, 2024
    Assignee: SEMES CO., LTD.
    Inventors: Ohyeol Kwon, Jun Keon Ahn, Soo Young Park, Jung Hwan Lee
  • Patent number: 11970616
    Abstract: A modified conjugated diene-based polymer having high linearity and improved compounding properties is provided. The modified conjugated diene-based polymer includes phosphor, sulfur and chlorine in specific amount ranges, and the degree of branching is controlled, and accordingly, if applied to a rubber composition, tensile strength and viscoelasticity may be excellent, and processability may be markedly improved.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: April 30, 2024
    Assignee: LG Chem, Ltd.
    Inventors: Kyoung Hwan Oh, Hyo Jin Bae, Hyun Woong Park, Jeong Heon Ahn, Jae Hyeong Park
  • Patent number: 11974256
    Abstract: Certain aspects of the present disclosure provide techniques for scheduling and bandwidth part (BWP) adaptation for extended reality (XR). A method that may be performed by a user equipment (UE) includes obtaining an indication to change at least one of a minimum control-channel-to-data-channel delay or a bandwidth for receiving a first transmission on a BWP; changing the at least one of the minimum control-channel-to-data-channel delay to a new minimum control-channel-to-data-channel delay or the bandwidth on the BWP to a new bandwidth; and receiving the first transmission on the BWP using the at least one of the new minimum control-channel-to-data-channel delay or the new bandwidth of the BWP.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: April 30, 2024
    Assignee: QUALCOMM Incorporated
    Inventors: Hwan Joon Kwon, Huilin Xu, Yuchul Kim, Peter Pui Lok Ang, Yeliz Tokgoz, Jay Kumar Sundararajan, Krishna Kiran Mukkavilli, Tingfang Ji, Jing Lei, Ravi Agarwal, Seyong Park, Seyedkianoush Hosseini
  • Patent number: 11969397
    Abstract: The present invention relates to a composition for preventing or treating transplantation rejection or a transplantation rejection disease, comprising a novel compound and a calcineurin inhibitor. A co-administration of the present invention 1) reduces the activity of pathogenic Th1 cells or Th17 cells, 2) increases the activity of Treg cells, 3) has an inhibitory effect against side effects, such as tissue damage, occurring in the sole administration thereof, 4) inhibits various pathogenic pathways, 5) inhibits the cell death of inflammatory cells, and 6) increases the activity of mitochondria, in an in vivo or in vitro allogenic model, a transplantation rejection disease model, a skin transplantation model, and a liver-transplanted patient, and thus inhibits transplantation rejection along with mitigating side effects possibly occurring in the administration of a conventional immunosuppressant alone.
    Type: Grant
    Filed: November 7, 2019
    Date of Patent: April 30, 2024
    Assignee: THE CATHOLIC UNIVERSITY OF KOREA INDUSTRY-ACADEMIC COOPERATION FOUNDATION
    Inventors: Mi-La Cho, Dong-Yun Shin, Jong-Young Choi, Chul-Woo Yang, Sung-Hwan Park, Seon-Yeong Lee, Min-Jung Park, Joo-Yeon Jhun, Se-Young Kim, Hyeon-Beom Seo, Jae-Yoon Ryu, Keun-Hyung Cho
  • Patent number: D1025167
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: April 30, 2024
    Inventors: Han Wool Choi, Jun Hwan Park, Seok Young Youn, Hun Keon Ko, Ho Seong Kang, Hyeon Jeong An, Gyu Jong Hwang, Soo Kyoung Kang, Dong Jin Hyun, Geun Sang Yu