Patents by Inventor Injune Kim

Injune Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20220149134
    Abstract: A light emitting display panel and a device light emitting display device including the same including a substrate, a thin film transistor disposed on the substrate layer and comprising a first active layer a first gate electrode and the first electrode pattern, a first insulating layer disposed on the thin film transistor, a conductive pattern disposed on the first insulation layer, a second insulating layer disposed on the conductive pattern, a first electrode disposed on the second insulating film, and contacted to the first electrode pattern, and a bank exposing a portion of the top surface of the first electrode, wherein the first electrode and the conducting pattern is used as an electrode of storage capacitor and the conducting pattern is overlapped with a top surface of the first electrode not overlapped with the bank.
    Type: Application
    Filed: November 5, 2021
    Publication date: May 12, 2022
    Inventors: Jae-Woong YOUN, InJune KIM, Younsub KIM
  • Patent number: 10497335
    Abstract: A display device comprises: a pixel array including pixels connected to gate lines; a gate driver that sequentially supplies scan signals to the gate lines by using a plurality of stages connected in cascade; and a driving voltage generator that supplies first and second driving voltages to the gate driver and inverts the first and second driving voltages of opposite phases at given intervals, wherein an nth stage (n is a natural number), among the stages of the gate driver, comprises: a start controller that charges a Q1 node in a period when an (n?1)th scan signal and a first clock signal are synchronized, and charges a Q1B node in a period when an (n?1)th carry signal, opposite in phase to the (n?1)th scan signal, and the first clock signal are synchronized; a first node controller that charges a Q2 node or a Q2B node in response to a voltage at the Q1 node; a first output control transistor that outputs an nth scan signal through a Q node in response to a voltage at the Q2 node; and a second output contro
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: December 3, 2019
    Assignee: LG Display Co., Ltd.
    Inventors: Seok Noh, Injune Kim, Kimin Son
  • Publication number: 20190047067
    Abstract: Disclosed herein is an adhering structure of different materials. The adhering structure can be used for integrally adhering a non-ferrous metal plate and a steel metal plate to each other. A tubular element is configured to penetrate through an adhesion hole of the non-ferrous metal plate and to support a surface of the steel metal plate. A welding part is formed in an internal hollow of the tubular element and includes an inner surface portion of the tubular element and forms a surface portion of the steel metal plate. The welding part is formed from a material that provides a molten pool of a filler metal during a welding process.
    Type: Application
    Filed: November 22, 2017
    Publication date: February 14, 2019
    Inventors: Hyeon Jeong Ryu, Injune Kim
  • Publication number: 20180144711
    Abstract: A display device comprises: a pixel array including pixels connected to gate lines; a gate driver that sequentially supplies scan signals to the gate lines by using a plurality of stages connected in cascade; and a driving voltage generator that supplies first and second driving voltages to the gate driver and inverts the first and second driving voltages of opposite phases at given intervals, wherein an nth stage (n is a natural number), among the stages of the gate driver, comprises: a start controller that charges a Q1 node in a period when an (n?1)th scan signal and a first clock signal are synchronized, and charges a Q1B node in a period when an (n?1)th carry signal, opposite in phase to the (n?1)th scan signal, and the first clock signal are synchronized; a first node controller that charges a Q2 node or a Q2B node in response to a voltage at the Q1 node; a first output control transistor that outputs an nth scan signal through a Q node in response to a voltage at the Q2 node; and a second output contro
    Type: Application
    Filed: November 14, 2017
    Publication date: May 24, 2018
    Applicant: LG Display Co., Ltd.
    Inventors: Seok NOH, Injune KIM, Kimin SON
  • Publication number: 20140370079
    Abstract: The present application describes a method of inhibiting tumor growth including contacting the tumor with a compound that inhibits activity of RhoJ protein.
    Type: Application
    Filed: May 6, 2014
    Publication date: December 18, 2014
    Applicant: Korea Advanced Institute of Science and Technology (KAIST)
    Inventors: Gou Young KOH, Chan Kim, Hanseul Yang, Won Do Heo, Injune Kim, Sangyong Jon, Akiyoshi Uemura