Patents by Inventor Inseok Stephen CHOI

Inseok Stephen CHOI has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11579811
    Abstract: A storage device is described. The storage device may store data in a storage memory, and may have a host interface to manage communications between the storage device and a host machine. The storage device may also include a translation layer to translate addresses between the host machine and the storage memory, and a storage interface to access data from the storage memory. An in-storage monitoring engine may determine characteristics of the storage device, such as latency, bandwidth, and retention.
    Type: Grant
    Filed: November 15, 2021
    Date of Patent: February 14, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Byoung Young Ahn
  • Publication number: 20220075566
    Abstract: A storage device is described. The storage device may store data in a storage memory, and may have a host interface to manage communications between the storage device and a host machine. The storage device may also include a translation layer to translate addresses between the host machine and the storage memory, and a storage interface to access data from the storage memory. An in-storage monitoring engine may determine characteristics of the storage device, such as latency, bandwidth, and retention.
    Type: Application
    Filed: November 15, 2021
    Publication date: March 10, 2022
    Inventors: Inseok Stephen CHOI, Yang Seok KI, Byoung Young AHN
  • Patent number: 11194517
    Abstract: A storage device includes an application container containing applications, each of which runs in one or more namespaces; flash memory to store data; a host interface to manage communications between the storage device and a host machine; a flash translation layer to translate a first address received from the host machine into a second address in the flash memory; a flash interface to access the data from the second address in the flash memory; and a polymorphic device kernel including an in-storage monitoring engine. The polymorphic device kernel receives a plurality of packets to an application running on the storage device and provides the flash interface based on a namespace associated with the plurality of packets. The in-storage monitoring engine determines a dynamic characteristic of the storage device at run-time based on a matching of a profiling command received from the host machine in a performance table.
    Type: Grant
    Filed: October 29, 2019
    Date of Patent: December 7, 2021
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Byoung Young Ahn
  • Patent number: 11042328
    Abstract: Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.
    Type: Grant
    Filed: December 19, 2018
    Date of Patent: June 22, 2021
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Sheng Qiu
  • Patent number: 10599349
    Abstract: Embodiments are disclosed for adaptive power reduction for a solid-state storage device to dynamically control power consumption. Aspects of the embodiments include receiving a power limit command from a host; receiving power consumption feedback; using the power limit command and the power consumption feedback to calculate a new degree of parallelism; using the new degree of parallelism to control one or more of: i) processor parallelism, including activation of different numbers of processors, ii) memory parallelism, including memory pool length; and iii) nonvolatile memory parallelism, including activation of different numbers of nonvolatile memory devices.
    Type: Grant
    Filed: March 21, 2016
    Date of Patent: March 24, 2020
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inseok Stephen Choi, Byoung Young Ahn, Yang Seok Ki
  • Publication number: 20200081658
    Abstract: A storage device includes an application container containing applications, each of which runs in one or more namespaces; flash memory to store data; a host interface to manage communications between the storage device and a host machine; a flash translation layer to translate a first address received from the host machine into a second address in the flash memory; a flash interface to access the data from the second address in the flash memory; and a polymorphic device kernel including an in-storage monitoring engine. The polymorphic device kernel receives a plurality of packets to an application running on the storage device and provides the flash interface based on a namespace associated with the plurality of packets. The in-storage monitoring engine determines a dynamic characteristic of the storage device at run-time based on a matching of a profiling command received from the host machine in a performance table.
    Type: Application
    Filed: October 29, 2019
    Publication date: March 12, 2020
    Inventors: Inseok Stephen CHOI, Yang Seok KI, Byoung Young AHN
  • Publication number: 20200034292
    Abstract: An in-memory cluster computing framework node is described. The node includes storage devices having various priorities. The node also includes a resource monitor to monitor the operation of the storage devices. The node also includes a resource scheduler. When the resource monitor indicates that a storage device is at or approaching saturation, the resource scheduler can migrate data from that storage device to another storage device of lower priority.
    Type: Application
    Filed: October 2, 2019
    Publication date: January 30, 2020
    Inventors: Inseok Stephen CHOI, Yang Seok KI
  • Patent number: 10489075
    Abstract: A solid state drive with a capability to select physical flash memory blocks and erasure and programming methods according to requirements of an application using storage in the solid state drive. A wear-out tracker in the solid state drive counts programming and erase cycles, and a raw bit error rate tracker in the solid state drive monitors raw bit errors in data read from the solid state drive. The application provides, to the solid state, drive requirements on an allowable retention time, corresponding to the anticipated storage time of data stored by the application, and on an average response time corresponding to programming and read times for the flash memory. The solid state drive identifies physical flash memory blocks suitable for meeting the requirements, and allocates storage space to the application from among the identified physical flash memory blocks.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: November 26, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inseok Stephen Choi, Yang Seok Ki
  • Patent number: 10481934
    Abstract: An embodiment includes a system, comprising: a communication interface configured to communicate with a remote system external to the system; a memory; and a processor coupled to the communication interface and the memory and configured to: receive performance data from the remote system through the communication interface; maintain a virtual performance register in response to the performance data; receive a performance register access associated with the remote system through the communication interface; and respond to the performance data access through the communication interface based on the virtual performance register.
    Type: Grant
    Filed: March 7, 2016
    Date of Patent: November 19, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki
  • Patent number: 10474374
    Abstract: A storage device (220) is described. The storage device (220) may store data in a storage memory (445), and may have a host interface (420) to manage communications between the storage device (220) and a host machine (110, 115, 120, 125, 130). The storage device (220) may also include a translation layer (430) to translate addresses between the host machine (110, 115, 120, 125, 130) and the storage memory (445), and a storage interface (440) to access data from the storage memory (445). An in-storage monitoring engine (425) may determine characteristics (605, 610, 615) of the storage device (220), such as latency (605), bandwidth (610), and retention (615).
    Type: Grant
    Filed: August 1, 2016
    Date of Patent: November 12, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Byoung Young Ahn
  • Patent number: 10467136
    Abstract: An in-memory cluster computing framework node is described. The node includes storage devices having various priorities. The node also includes a resource monitor to monitor the operation of the storage devices. The node also includes a resource scheduler. When the resource monitor indicates that a storage device is at or approaching saturation, the resource scheduler can migrate data from that storage device to another storage device of lower priority.
    Type: Grant
    Filed: October 13, 2018
    Date of Patent: November 5, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki
  • Patent number: 10437486
    Abstract: A Tenant-Aware Storage-Sharing Engine (TASTE) (225) is described. The TASTE (225) may include storage (510) for information about a set of available storage devices (705, 710) at a data center (105). A reception logic 505) may receive storage device requirements (415) from a tenant (145, 230). Selection logic (515) may then select a subset of the available storage devices (705, 710) that satisfies the storage device requirements 415) of the tenant (145, 230).
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Byoung Young Ahn
  • Patent number: 10439881
    Abstract: A system for answering queries regarding a system topology and local storage information in a data center is described. The system may include reception logic and transmission logic that may receive and send data, respectively. Among the data that may be received and sent are queries and responses. The system may have storage for a storage graph, which may include nodes and multi-weight edges. A storage distance predictor may use the storage graph to generate the responses to the queries.
    Type: Grant
    Filed: July 28, 2016
    Date of Patent: October 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki, Byoung Young Ahn
  • Patent number: 10423331
    Abstract: A storage device includes an application container containing one or more applications; a polymorphic storage device (PSD) kernel configured to receive a plurality of packets including data, messages, and commands from a host computer, and route the plurality of packets to an application in the application container based on a command included in the plurality of packets; and a PSD interface layer configured to provide an interface between the one or more applications and the PSD kernel. The storage device can be transformed from a first type of storage device to a second type of storage device according to the control command received via the PSD control interface.
    Type: Grant
    Filed: April 19, 2016
    Date of Patent: September 24, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Yang Seok Ki
  • Patent number: 10359822
    Abstract: An embodiment includes a system, comprising: a processor; a plurality of memories; and a control circuit coupled to the processor and the memories, and configured to: receive a power limit; measure a power consumption of the processor and the memories; and iteratively change a plurality of operating parameters of the processor and the memories to optimize an objective function associated with the system to operating states where the power consumption is less than or equal to the power limit.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: July 23, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Byoung Young Ahn, Yang Seok Ki
  • Patent number: 10289722
    Abstract: A multi-level cache system may include a server with a processor and memory. The memory may include a database cache system for use with a distributed database system. The server may also include a Solid State Drive that may include a key-value store and a second storage device that may store a backend database. The key-value store may act as a second level cache to the database cache system.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: May 14, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Byoung Young Ahn, Yang Seok Ki
  • Patent number: 10275357
    Abstract: In a multi-level cache system, a logic may be responsible for calculating the appropriate sizes for a database cache and a key-value store. Reception circuitry may receive a hit rate for the database cache, a reuse distance for the key-value store, and a user-selected quality of server. An adaption calculator may then calculate a target size for the database cache and a target size for the key-value store. Transmission circuitry may then transmit the target size for the database cache and the target size for the key-value store for use in the multi-level cache system.
    Type: Grant
    Filed: April 11, 2016
    Date of Patent: April 30, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Inseok Stephen Choi, Byoung Young Ahn, Yang Seok Ki
  • Publication number: 20190121581
    Abstract: Embodiments of the inventive concept improve performance, energy efficiency, and capacity of storage solutions, for example, by reducing the data movement between the CPU and the storage device and increasing the available capacity of the underlying storage devices via in-storage support for data compaction. Embodiments include a storage apparatus and method for autonomous in-storage space compaction initiated by a host-side command and according to metadata specified by a host. A space compact engine can function as an independent module or logic section within a storage device, which can migrate data within the storage device, thereby freeing up capacity and making preexisting data more compact. The space compact engine can cause self compact operations, self compact and trim operations, move and compact operations, and/or merge and compact operations. The space compact engine can notify the host of the completion of the operations.
    Type: Application
    Filed: December 19, 2018
    Publication date: April 25, 2019
    Inventors: Inseok Stephen CHOI, Yang Seok KI, Sheng QIU
  • Patent number: 10268521
    Abstract: A electronic system includes: a cluster manager configured to: divide a user program into a group of parallel execution tasks, and generate shuffling metadata to map intermediate data and processed data from the parallel execution tasks; a shuffling cluster node, coupled to the cluster manager, configured to: store the shuffling metadata by an in-storage computer (ISC), and incrementally shuffle each of the sub-packets of the intermediate data and the processed data, by the ISC, based on the shuffling metadata when the parallel execution task is in process; and a local storage, coupled to the shuffling cluster node and mapped through the shuffling metadata, for receiving the sub-packets of the processed data from the shuffling cluster node.
    Type: Grant
    Filed: May 6, 2016
    Date of Patent: April 23, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inseok Stephen Choi, Yang Seok Ki
  • Patent number: 10241701
    Abstract: A solid state memory system includes: an interface circuit; a device processor, coupled to the interface circuit, configured to receive a dynamic power limit command through the interface circuit and update a metadata log based on the dynamic power limit command; a non-volatile memory array coupled to the interface circuit; and a power manager unit, coupled between the device processor and the non-volatile memory array, configured to alter an operating configuration of the non-volatile memory array to meet the requirement of the dynamic power limit command.
    Type: Grant
    Filed: December 21, 2015
    Date of Patent: March 26, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Inseok Stephen Choi, Byoung Young Ahn, Yang Seok Ki