Patents by Inventor In Suk Kim
In Suk Kim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250124835Abstract: An example display driving integrated circuit includes a gamma voltage generator, a source driver, gamma lines, a first transistor, and a second transistor. The gamma voltage generator generates gamma voltages. The source driver generates data signals based on the gamma voltages. The gamma lines connect the gamma voltage generator with the source driver, and transmit the gamma voltages. The first transistor and the second transistor connect to a first end and a second end of a first gamma line of the gamma lines. The first transistor includes a first gate for receiving a first signal. The second transistor includes a second gate for receiving a second signal. The first signal and the second signal are complementary to each other.Type: ApplicationFiled: June 13, 2024Publication date: April 17, 2025Inventors: Jeeyeon Eom, In-Suk Kim, Yeonjeong Lee
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Publication number: 20250095541Abstract: The present disclosure relates to a display driver integrated circuit and a display device. An example of the display driver integrated circuit includes a source driver and a timing controller. The source driver is configured to output a data voltage based on an image data to a first source line and a second source line.Type: ApplicationFiled: September 3, 2024Publication date: March 20, 2025Inventors: Taek Su Kwon, In-Suk Kim, Dongwook Suh
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Publication number: 20240387313Abstract: Provided are a dual cooling semiconductor device and a dual cooling semiconductor system. The dual cooling semiconductor device includes: a first cooling structure and a second cooling structure each including a thermally conductive electrical insulation layer; a first internal metal plate formed on an upper surface of the second cooling structure; a second internal metal plate formed on a lower surface of the first cooling structure; a third internal metal plate formed on the first internal metal plate and supporting a semiconductor chip; a metal block formed on the semiconductor chip; and a fourth internal metal plate formed below the second internal metal plate and having a metal block insertion hole into which the metal block is inserted.Type: ApplicationFiled: September 14, 2022Publication date: November 21, 2024Inventors: Ki-Myung YOON, In-Suk KIM, Jooyaung EOM
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Publication number: 20240290759Abstract: Provided is a semiconductor device. A semiconductor device is implemented as a semiconductor module package for driving an inverter, the semiconductor device may include: a first upper metal layer in which a plurality of first semiconductor chips implementing a switching pattern of a low voltage phase are disposed along a first row in a first direction; a first connection connecting the plurality of first semiconductor chips in series and extending to a second upper metal layer; and a first lead frame providing power to the semiconductor device from an external source through the second upper metal layer, wherein, in the second upper metal layer, a first vertically extending leg portion and a second vertically extending leg portion of the first lead frame forming a fork shape are disposed, and the first connection is disposed between the first vertically extending leg portion and the second vertically extending leg portion.Type: ApplicationFiled: February 21, 2024Publication date: August 29, 2024Inventors: Taekkeun LEE, In-Suk KIM, Ki-Myung YOON, Jooyaung EOM, Soonho KWON
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Publication number: 20240222255Abstract: Provided is a semiconductor device. A semiconductor device may include: an insulated substrate whose upper surface is exposed to an outside of a molding portion; a semiconductor chip formed on a lower surface of the insulated substrate; a drain connection lead, one part of which forming a junction extending along a first direction or a second direction perpendicular to the first direction on the lower surface of the insulated substrate, and the other part of which forming a terminal that can be connected to an external device; and a source connection lead, one part of which forming an electrical connection with the semiconductor chip through a connection, and the other part of which forming a terminal that can be connected to an external device.Type: ApplicationFiled: December 26, 2023Publication date: July 4, 2024Inventors: Jooyaung EOM, In-Suk KIM, Ki-Myung YOON, Taekkeun LEE, Soonho KWON
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Publication number: 20240213126Abstract: A semiconductor device is provided. The semiconductor device may include a heat dissipation pad that is formed such that the upper surface is exposed to the outside of a molding portion, a first lead frame that is formed on the left side of the heat dissipation pad so as to be spaced apart from the heat dissipation pad and includes a first portion extending in an upward and downward direction and a second portion protruding in a right direction, second lead frames that are formed on the right side of the heat dissipation pad, a first connection part that is formed so as to be connected to both of the lower surface of the heat dissipation pad and the lower surface of the second portion of the first lead frame, a semiconductor chip that is formed on the lower surface of the heat dissipation pad, and a second connection part that connects the semiconductor chip and the second lead frames.Type: ApplicationFiled: December 19, 2023Publication date: June 27, 2024Inventors: Jooyaung EOM, In-Suk KIM, Ki-Myung YOON, Taekkeun LEE, Soonho KWON
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Publication number: 20240213208Abstract: Provided is a semiconductor device. A semiconductor device is implemented as a semiconductor module package for driving an inverter, the semiconductor device may include: a first upper metal layer in which a plurality of semiconductor chips implementing a right phase switching pattern are disposed along a first direction to form a first row; a second upper metal layer in which a plurality of semiconductor chips implementing a left phase switching pattern are disposed along the first direction to form a second row; a first connection, in the first upper metal layer, connecting a plurality of semiconductor chips disposed along the first row to each other in series and to the second upper metal layer in parallel; and a second connection, in the second upper metal layer, connecting a plurality of semiconductor chips disposed along the second row to each other in series.Type: ApplicationFiled: December 26, 2023Publication date: June 27, 2024Inventors: Taekkeun LEE, In-Suk KIM, Ki-Myung YOON, Jooyaung EOM, Soonho KWON
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Patent number: 12020664Abstract: A gamma voltage generating circuit includes a gamma buffer configured to output a gamma voltage, a first gamma line and a second gamma line providing an output path of the gamma voltage, an output selecting unit configured to connect an output terminal of the gamma buffer to one of the first gamma line and the second gamma line, and an output resistor unit having a first resistor connected to the first gamma line and a second resistor connected to the second gamma line. The second resistor has a resistance value different from that of the first resistor.Type: GrantFiled: November 22, 2022Date of Patent: June 25, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jee Hwal Kim, Ki Ho Kong, In Suk Kim
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Patent number: 11742136Abstract: A coil component includes a support substrate including a through-hole disposed therein; a body including the support substrate embedded therein, and having a core disposed in the through-hole of the support substrate; a coil portion disposed on the support substrate, embedded in the body, and having a plurality of turns with reference to the core as an axis on the support substrate; and a shielding pattern disposed between an internal wall of the support substrate, by which the through-hole is defined, and the core.Type: GrantFiled: July 2, 2020Date of Patent: August 29, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Young Sun Kim, Sung Hee Kim, In Suk Kim
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Patent number: 11728317Abstract: A power module package is provided. The power module package may include: a first substrate; a second substrate; a semiconductor chip disposed between the first substrate and the second substrate; and a mutual-connection layer that is formed between the semiconductor chip and the second substrate and provides conductive connection between the semiconductor chip and the second substrate.Type: GrantFiled: May 10, 2021Date of Patent: August 15, 2023Assignee: POWER MASTER SEMICONDUCTOR CO., LTD.Inventors: In-Suk Kim, Ki-Myung Yoon
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Patent number: 11710459Abstract: An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.Type: GrantFiled: July 1, 2022Date of Patent: July 25, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: In-Suk Kim, Jungmoon Kim, Woo-Nyoung Lee
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Patent number: 11688320Abstract: Disclosed is a gamma amplifier which includes a first amplification device that receives a first input signal during a first track period in a first time period, compensates for a first offset voltage from the first input signal during a first compensation period in the first time period, and generates a first output signal during a second time period after the first time period based on a control signal, and a second amplification device that receives a second input signal during a second track period in the second time period, compensates for a second offset voltage from the second input signal during a second compensation period in the second time period, and generates a second output signal during a third time period after the second time period based on the control signal and processing circuitry configured to generate the control signal.Type: GrantFiled: March 25, 2022Date of Patent: June 27, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: In-Suk Kim, Yeonjeong Lee
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Publication number: 20230078111Abstract: A gamma voltage generating circuit includes a gamma buffer configured to output a gamma voltage, a first gamma line and a second gamma line providing an output path of the gamma voltage, an output selecting unit configured to connect an output terminal of the gamma buffer to one of the first gamma line and the second gamma line, and an output resistor unit having a first resistor connected to the first gamma line and a second resistor connected to the second gamma line. The second resistor has a resistance value different from that of the first resistor.Type: ApplicationFiled: November 22, 2022Publication date: March 16, 2023Inventors: JEE HWAL KIM, Ki Ho KONG, IN Suk KIM
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Publication number: 20230063319Abstract: Disclosed is a gamma amplifier which includes a first amplification device that receives a first input signal during a first track period in a first time period, compensates for a first offset voltage from the first input signal during a first compensation period in the first time period, and generates a first output signal during a second time period after the first time period based on a control signal, and a second amplification device that receives a second input signal during a second track period in the second time period, compensates for a second offset voltage from the second input signal during a second compensation period in the second time period, and generates a second output signal during a third time period after the second time period based on the control signal and processing circuitry configured to generate the control signal.Type: ApplicationFiled: March 25, 2022Publication date: March 2, 2023Applicant: Samsung Electronics Co., Ltd.Inventors: In-Suk KIM, Yeonjeong LEE
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Patent number: 11574763Abstract: A coil component includes a body having both end surfaces opposing each other in a length direction; a support substrate disposed in the body; a coil portion disposed on the support substrate in a width direction of the body, and including first and second lead-out portions each exposed to a first surface and a second surface of the body opposing each other in a thickness direction of the body, respectively, and disposed on the support substrate; and first and second external electrodes disposed on the first surface of the body, spaced apart from each other, and connected to one ends of the first and second lead-out portions exposed to the first surface of the body, respectively.Type: GrantFiled: May 13, 2020Date of Patent: February 7, 2023Assignee: SAMSUNG ELECTRO-MECHANICS CO., LTD.Inventors: Kwang Il Park, In Suk Kim, Young Sun Kim, Sung Hee Kim, In Young Kang
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Patent number: 11538433Abstract: A gamma voltage generating circuit includes a gamma buffer configured to output a gamma voltage, a first gamma line and a second gamma line providing an output path of the gamma voltage, an output selecting unit configured to connect an output terminal of the gamma buffer to one of the first gamma line and the second gamma line, and an output resistor unit having a first resistor connected to the first gamma line and a second resistor connected to the second gamma line. The second resistor has a resistance value different from that of the first resistor.Type: GrantFiled: August 2, 2021Date of Patent: December 27, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jee Hwal Kim, Ki Ho Kong, In Suk Kim
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Patent number: 11532262Abstract: A display driver includes first and second level shifters, respectively receiving a digital signal's most significant bit (MSB) and the digital signal's non-MSB. The first level shifter includes a first input terminal, a first output terminal via which a signal input to the first input terminal is output, a second input terminal, and a second output terminal via which a signal input to the second input terminal is output. The second level shifter includes a third input terminal, a third output terminal via which a signal input to the third input terminal is output, a fourth input terminal, and a fourth output terminal via which a signal input to the fourth input terminal is output. The first input terminal receives an inverted MSB, the second input terminal receives the MSB, the third input terminal receives the non-MSB, and the fourth input terminal receives the inverted non-MSB.Type: GrantFiled: September 24, 2020Date of Patent: December 20, 2022Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jung Moon Kim, In-Suk Kim, Chan Bong Yu
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Publication number: 20220335903Abstract: An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.Type: ApplicationFiled: July 1, 2022Publication date: October 20, 2022Inventors: In-Suk KIM, Jungmoon KIM, Woo-Nyoung LEE
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Publication number: 20220254700Abstract: A packaged power semiconductor device is provided. The packaged power semiconductor device may include: a direct bonded copper (DBC) substrate configured to include an upper surface in which an upper region, a middle region, and a lower region are defined; a metal tab formed to be directly connected to the upper surface in the upper region; a first lead formed to be directly connected to the upper surface in the lower region; and a semiconductor chip formed on the upper surface in the middle region.Type: ApplicationFiled: May 14, 2021Publication date: August 11, 2022Inventors: In-Suk Kim, Ki-Myung Yoon
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Patent number: 11393407Abstract: An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.Type: GrantFiled: December 1, 2020Date of Patent: July 19, 2022Assignee: Samsung Electronics Co., Ltd.Inventors: In-Suk Kim, Jungmoon Kim, Woo-Nyoung Lee