Abstract: Provided is a method for matching antenna impedance in a wireless communication system. The method includes determining an approximate reflection coefficient based on an input signal and an output signal of a bidirectional coupler connected to a signal path of an antenna; determining an antenna impedance matching parameter corresponding to the determined approximate reflection coefficient by using a lookup table; and performing antenna impedance matching based on the antenna impedance matching parameter.

Abstract: Provided is a method for matching antenna impedance in a wireless communication system. The method includes determining an approximate reflection coefficient based on an input signal and an output signal of a bidirectional coupler connected to a signal path of an antenna; determining an antenna impedance matching parameter corresponding to the determined approximate reflection coefficient by using a lookup table; and performing antenna impedance matching based on the antenna impedance matching parameter.

Abstract: Provided is a method for matching antenna impedance in a wireless communication system. The method includes determining an approximate reflection coefficient based on an input signal and an output signal of a bidirectional coupler connected to a signal path of an antenna; determining an antenna impedance matching parameter corresponding to the determined approximate reflection coefficient by using a lookup table; and performing antenna impedance matching based on the antenna impedance matching parameter.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: A modem chip communicates with a radio frequency (RF) chip and includes a digital interface configured to receive data including a plurality of samples from the RF chip based on digital communication. A logic block generates a frame synchronization signal based on a clock signal in the modem chip, provides the generated frame synchronization signal to the digital interface, and receives the plurality of samples in synchronization with the frame synchronization signal.

Abstract: Provided is a method for matching antenna impedance in a wireless communication system. The method includes determining an approximate reflection coefficient based on an input signal and an output signal of a bidirectional coupler connected to a signal path of an antenna; determining an antenna impedance matching parameter corresponding to the determined approximate reflection coefficient by using a lookup table; and performing antenna impedance matching based on the antenna impedance matching parameter.

Abstract: Disclosed are a method and apparatus for processing a transmission signal using a window function that changes a spectrum characteristic of a symbol. A transmission apparatus includes a symbol generator that generate a plurality of consecutive symbols, and a symbol windowing processor that is coupled with the symbol generator. The symbol windowing processor applies a first window function and a third window function that uses a difference between the first window and a second window, and changes a spectrum characteristic of each of the plurality of consecutive symbols, and processes neighboring symbols from among the plurality of consecutive symbols of which spectrum characteristics are changed, such that the symbols partially overlap one another.

Abstract: Disclosed are a method and apparatus for processing a transmission signal using a window function that changes a spectrum characteristic of a symbol. A transmission apparatus includes a symbol generator that generate a plurality of consecutive symbols, and a symbol windowing processor that is coupled with the symbol generator. The symbol windowing processor applies a first window function and a third window function that uses a difference between the first window and a second window, and changes a spectrum characteristic of each of the plurality of consecutive symbols, and processes neighboring symbols from among the plurality of consecutive symbols of which spectrum characteristics are changed, such that the symbols partially overlap one another.

Abstract: A smoothing apparatus for peak windowing includes an operator for generating a first input signal for smoothing using an input signal for peak windowing and a predetermined clipping threshold level. The apparatus also includes a subtractor for subtracting a feedback signal from the first input signal, and a maximum operator for generating a second input signal. The apparatus also includes a feedback path for generating a feedback signal for a next smoothed input signal by multiplying samples of the second input signal by window coefficients in a first window coefficient combination and a predetermined gain and summing up the multiplication results. The apparatus further includes a convolutional operator for generating a smoothed signal by multiplying samples of the second input signal by window coefficients in a second window coefficient combination for low pass filtering and summing up the multiplication results.

Abstract: An apparatus and a method for processing reduced bandwidth Envelope Tracking (ET) and Digital Pre-Distortion (DPD) are provided. The apparatus includes a Crest Factor Reduction (CFR) unit, a resealing Digital Pre-Distortion (DPD) unit, an envelope converter, a Supply Modulator (SM), and a Power Amplifier (PA). The CFR unit suppresses an increase of a side lobe occurring when a Peak to Average Power Ratio (PAPR) decreases with respect to a signal generated in a baseband according to a standard and passes through a transmit (Tx) filter. The resealing DPD unit receives an original envelope amplitude and a reduced bandwidth envelope amplitude of an In-phase/Quadrature-phase (I/Q) signal output from the CFR unit to perform a pre-distortion process. The envelope converter converts an envelope signal to a reduced bandwidth envelope signal based on the I/Q signal output from the CFR unit.

Abstract: A method and apparatus for reducing a Peak to Average Power Ratio (PAPR) using peak windowing is provided. In the apparatus, an absolute value calculator calculates an absolute value of an input signal, a subtractor subtracts a predetermined clipping threshold level from the absolute value, a smoothing unit performs smoothing on the subtracted signal according to a predetermined smoothing scheme and outputs a first smoothed signal, an adder adds the first smoothed signal to the clipping threshold level, an inverse calculator outputs a second smoothed signal by multiplying the clipping threshold level by an inverse of the added signal, and a multiplier outputs a final PAPR-reduced signal by multiplying the input signal by the second smoothed signal.

Abstract: A method and apparatus for transmitting a signal whereby it is determined if a Bandwidth Expansion Factor (BEF) Q is an integer, the BEF being determined as N/M according to a number N of subcarriers of a system band and a number M of subcarriers of an allocated band, an input signal to be transmitted Q times in a time domain when the Q is an integer is expanded, a Single Carrier Frequency Division Multiplexing Access (SC-FDMA) signal is generated, and the SC-FDMA signal is transmitted.

Abstract: A method and an apparatus for reducing Digital-to-Analog Conversion (DAC) bits at a transmitter of a Frequency Division Multiple Access (FDMA) system reduces a number of the bits for conversion so as to save power and reduce the cost of operation. The method can include generating a digital signal gain control value and an analog signal gain control value using subcarrier allocation information, a required Signal to Noise Ratio (SNR), and a Peak to Average Power Ratio (PAPR); controlling a gain of a signal input to a digital-to-analog converter using the digital signal gain control value; converting a digital signal of the controlled gain to an analog signal using the digital-to-analog converter; and restoring an original signal by controlling a gain of a signal output from the digital-to-analog converter using the analog signal gain control value.

Abstract: A smoothing apparatus for peak windowing includes an operator for generating a first input signal for smoothing using an input signal for peak windowing and a predetermined clipping threshold level. The apparatus also includes a subtractor for subtracting a feedback signal from the first input signal, and a maximum operator for generating a second input signal. The apparatus also includes a feedback path for generating a feedback signal for a next smoothed input signal by multiplying samples of the second input signal by window coefficients in a first window coefficient combination and a predetermined gain and summing up the multiplication results. The apparatus further includes a convolutional operator for generating a smoothed signal by multiplying samples of the second input signal by window coefficients in a second window coefficient combination for low pass filtering and summing up the multiplication results.

Abstract: A method and apparatus for reducing a Peak to Average Power Ratio (PAPR) using peak windowing is provided. In the apparatus, an absolute value calculator calculates an absolute value of an input signal, a subtractor subtracts a predetermined clipping threshold level from the absolute value, a smoothing unit performs smoothing on the subtracted signal according to a predetermined smoothing scheme and outputs a first smoothed signal, an adder adds the first smoothed signal to the clipping threshold level, an inverse calculator outputs a second smoothed signal by multiplying the clipping threshold level by an inverse of the added signal, and a multiplier outputs a final PAPR-reduced signal by multiplying the input signal by the second smoothed signal.