Abstract: Methods, systems, and products are disclosed for data transfers between nodes in a parallel computer that include: receiving, by an origin DMA on an origin node, a buffer identifier for a buffer containing data for transfer to a target node; sending, by the origin DMA to the target node, a RTS message; transferring, by the origin DMA, a data portion to the target node using a memory FIFO operation that specifies one end of the buffer from which to begin transferring the data; receiving, by the origin DMA, an acknowledgement of the RTS message from the target node; and transferring, by the origin DMA in response to receiving the acknowledgement, any remaining data portion to the target node using a direct put operation that specifies the other end of the buffer from which to begin transferring the data, including initiating the direct put operation without invoking an origin processing core.

Abstract: Segments of a virtual resource definition are copied from an existing virtual resource to create a new virtual resource definition or modifying an existing one to simplify virtualization management. The virtualization manager divides a virtual resource definition into a number of reusable segments. A user may then select one or more segments and place them into a new or existing virtual resource definition. The user can choose to mix and match segments to quickly create or modify a virtual resource definition such as a virtual server, virtual printer or virtual data storage. Any default information in the new virtual resource or old information in the existing resource is replaced by the information in the copied segment. Any dependencies in the existing virtual resource are resolved with user input to break the dependencies or copy dependent data.

Abstract: Macro diversity is managed at the edge in a mobile data network with edge data Macro diversity is managed at the edge in a mobile data network with edge data breakout with a component in a Mobile Internet Optimization Platform (MIOP) referred to as MIOP@NodeB. A set of NodeBs that are in simultaneous communication with user equipment are defined as an active set. One of the MIOP@NodeBs of the active set is selected as a master, with the remaining MIOP@NodeBs in the active set being designated slaves. During uplink of signaling data, the signaling data is sent from the UE to all the NodeBs in the active set, which send the signaling data to each of their corresponding MIOP@NodeBs. Each slave MIOP@NodeB sends its data to the master MIOP@NodeB, which combines the data from all into a best packet.

Abstract: A system and method for program access control includes, for a typestate, providing typestate properties and assigning a role to the typestate in a program in accordance with the typestate properties. Access to operations is limited for the typestate in the program based on the role assigned to the typestate and an access permission level.

Abstract: A method is provided for containing cold air in a corridor created on the side of a computer cabinet. The method includes providing a base mountable on the computer cabinet, and providing a panel fastened to the base and moveable with respect to the base, the panel being suitable for separating the cold air in the corridor below the panel from the hot air above the panel.

Abstract: An apparatus for controlling operation of a cache includes a first command queue, a second command queue and an input controller configured to receive requests having a first command type and a second command type and to assign a first request having the first command type to the first command queue and a second command having the first command type to the second command queue in the event that the first command queue has not received an indication that a first dedicated buffer is available.

Abstract: A method that may include: building a dependencies graph representing dependencies between code elements of a computer code; associating portions of the computer code with corresponding design specifications or requirements derived from a design specifications document or a requirements document respectively which is associated with the computer code, to yield a design specifications or requirements-code tracing map; and analyzing the design specifications or requirements-code tracing map based on the dependencies graph to yield an ordered list of design specifications or requirements respectively, wherein the order is selected such that functional tests written for the computer code and addressing design specifications or requirements of a higher order, will yield a higher level of functional test coverage of the computer code in terms of design specifications or requirements.

Abstract: An address provided in a request issued by an adapter is converted to an address directly usable in accessing system memory. The address includes a plurality of bits, in which the plurality of bits includes a first portion of bits and a second portion of bits. The second portion of bits is used to index into one or more levels of address translation tables to perform the conversion, while the first portion of bits are ignored for the conversion. The first portion of bits are used to validate the address.

Abstract: Methods, apparatuses, and computer program products for performing collective operations on a hybrid distributed processing system that includes a plurality of compute nodes and a plurality of tasks, each task is assigned a unique rank, and each compute node is coupled for data communications by at least two different networking topologies. At least one of the two networking topologies is a tiered tree topology having a root task and at least two child tasks and the at least two child tasks are peers of one another in the same tier. Embodiments include for each task, sending at least a portion of data corresponding to the task to all child tasks of the task through the tree topology; and sending at least a portion of the data corresponding to the task to all peers of the task at the same tier in the tree topology through the second topology.

Abstract: A method is disclosed for balancing the requirements of high availability achieved by redundant active components and power saving achieved by less active components. The requirement for high availability can be expressed by the recovery time objective (RTO) which specifies the amount of time it takes to recover from a failure in the system. Based on the configured RTO, the system configures the most appropriate power mode.

Abstract: A printing system for indicating print media quality to printer users includes a printing assembly configured to route print media along a pathway for printing. In an example, the system includes, but is not limited to, a thermal printer having a thermal print head for printing onto paper. The system also includes a light meter configured to detect light reflected from the print media, such as the paper. The light meter also measures a characteristic of the detected light. An indicator is coupled to the light meter, and configured to present a quality level of the print media to a user based on the measured characteristic of the detected light.

Abstract: Optimizing the deployment of a workload on a distributed processing system, the distributed processing system having a plurality of nodes, each node having a plurality of attributes, including: profiling during operations on the distributed processing system attributes of the nodes of the distributed processing system; selecting a workload for deployment on a subset of the nodes of the distributed processing system; determining specific resource requirements for the workload to be deployed; determining a required geometry of the nodes to run the workload; selecting a set of nodes having attributes that meet the specific resource requirements and arranged to meet the required geometry; deploying the workload on the selected nodes.

Abstract: A method is provided for preserving changes to a configuration of a running virtual machine. The method includes reading an initial configuration, starting the virtual machine under application of the initial configuration, modifying the configuration of the virtual machine during runtime, storing the modified configuration of the virtual machine during shutdown, and reading the modified configuration at re-start of the virtual machine and re-starting the virtual machine under application of the modified configuration.

Abstract: A method of operating a computer system comprising a bridge port between a hardware local area network (LAN) and a virtual switch includes providing a first hash table by the hardware LAN to the virtual switch via the bridge port, wherein the first hash table comprises addresses of a first plurality of VMs that comprise the hardware LAN, wherein the first plurality of VMs communicate with the hardware LAN via respective hardware network interface cards (NICs); and updating a second hash table in the virtual switch to include the addresses of the first hash table, wherein the second hash table further comprises addresses of a second plurality of VMs of the virtual switch, wherein the second plurality of VMs communicate with the virtual switch via respective virtual NICs.

Abstract: A method, system, and computer program product for identifying an overlay of a data processing target structure in a computing environment is provided. At least one of examining a mapping macro for the target structure with a set of valid ranges, comparing the set of valid ranges with the target structure to identify a string of at least one first invalid value and a last invalid value and locate invalid regions of the target structure, and examining executable code associated with the target structure, comparing at least one unchanged module against at least one additional module exhibiting an overlay characteristic to identify the string of the at least one first invalid value and the last invalid value and locate invalid regions of the target structure, is performed.

Abstract: An apparatus for programming at least one multi-level Phase Change Memory (PCM) cell having a first terminal and a second terminal A programmable control device controls the PCM cell to have a respective cell state by applying at least one current pulse to the PCM cell, the control device controlling the at least one current pulse by applying a respective first pulse to the first terminal and a respective second pulse applied to the second terminal of the PCM cell. The respective cell state is defined by a respective resistance level. The control device receives a reference resistance value defining a target resistance level for the cell, and further receives an actual resistance value of said PCM cell such that the applying the respective first pulse and said respective second pulse is based on said actual resistance value of the PCM cell and said received reference resistance value.

Abstract: A user authenticates to a Web- or cloud-based application from a browser-based client. The browser-based client has an associated rich client. After a session is initiated from the browser-based client (and a credential obtained), the user can discover that the rich client is available and cause it to obtain the credential (or a new one) for use in authenticating the user to the application (using the rich client) automatically, i.e., without additional user input. An application interface provides the user with a display by which the user can configure the rich client authentication operation, such as specifying whether the rich client should be authenticated automatically if it detected as running, whether and what extent access to the application by the rich client is to be restricted, if and when access to the application by the rich client is to be revoked, and the like.

Abstract: A printed circuit board having one or more holes that are controllably drilled to extend into the printed circuit board substrate to a predetermined depth intermediate first and second faces. A mechanical locating pin is received into each of the one or more holes to mechanically align a first component for electronically interfacing with the printed circuit board substrate. A second component is installed on the second face directly opposite of the one or more holes such that the second component is in electronic communication with conductive traces or interconnects formed on the second face directly opposite of the hole.

Abstract: A semiconductor-on-insulator structure includes a buried dielectric layer interposed between a base semiconductor substrate and a surface semiconductor layer. The buried dielectric layer comprises an oxide material that includes a nitrogen gradient that peaks at the interface of the buried dielectric layer with at least one of the base semiconductor substrate and surface semiconductor layer. The interface of the buried dielectric layer with the at least one of the base semiconductor substrate and surface semiconductor layer is abrupt, providing a transition in less than about 5 atomic layer thickness, and having less than about 10 angstroms RMS interfacial roughness. A second dielectric layer comprising an oxide dielectric material absent nitrogen may be located interposed between the buried dielectric layer and the surface semiconductor layer.

Abstract: Methods and means of error correction code (ECC) debugging may comprise detecting whether a bit error has occurred; determining which bit or bits were in error; and using the bit error information for debug. The method may further comprise comparing ECC syndromes against one or more ECC syndrome patterns. The method may allow for accumulating bit error information, comparing error bit failures against a pattern, trapping data, counting errors, determining pick/drop information, or stopping the machine for debug.