Patents by Inventor Ioannis MANTHOPOULOS

Ioannis MANTHOPOULOS has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240333945
    Abstract: A system and method for fixed size texture compression utilizing dynamic alpha channel compression utilizes block-based compression. The method includes determining a first endpoint of a pixel block including four pixels, each pixel represented by a plurality of channels; determining a second endpoint of the pixel block, which is not the first endpoint; encoding the first endpoint and the second endpoint using a first plurality of bits; encoding a first quantization level using a second plurality of bits; encoding a second quantization level using a third plurality of bits; encoding an alpha map of the four pixels using a fourth plurality of bits; encoding a location of the first endpoint and a location of the second endpoint using a fifth plurality of bits; and storing an addressing indicator bit based on a distance between a value of the first endpoint and a value of the second endpoint.
    Type: Application
    Filed: April 5, 2023
    Publication date: October 3, 2024
    Applicant: Think Silicon Research and Technology Single Member S.A.
    Inventors: Georgios KERAMIDAS, Ioannis MANTHOPOULOS, Ioannis BLAGAS, Athanasia LYTRA, Chrysa KOKKALA, Iakovos STAMOULIS
  • Publication number: 20240333933
    Abstract: A system and method for fixed size texture compression utilizes a four pixel block. The method includes determining a first endpoint of a pixel block including four pixels, each pixel represented by a red channel, a green channel and a blue channel; determining a second endpoint of the pixel block, which is not the first endpoint; encoding the first endpoint and the second endpoint using a first plurality of bits; encoding a first quantization level using a second plurality of bits; encoding a second quantization level using a third plurality of bits; encoding a location of the first endpoint and a location of the second endpoint using a fourth plurality of bits; and encoding an addressing indicator bit based on a distance between a value of the first endpoint and a value of the second endpoint.
    Type: Application
    Filed: April 5, 2023
    Publication date: October 3, 2024
    Applicant: Think Silicon Research and Technology Single Member S.A.
    Inventors: Georgios KERAMIDAS, Ioannis MANTHOPOULOS, Ioannis BLAGAS, Athanasia LYTRA, Chrysa KOKKALA, Iakovos STAMOULIS