Patents by Inventor Iosif Gasparakis
Iosif Gasparakis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 10382344Abstract: An embodiment may include circuitry to be included, at least in part, in at least one node in a network. The circuitry may generate, at least in part, and/or receive, at least in part, at least one packet. The packet may be received, at least in part, by at least one switch node in the network. The switch node may designate, in response at least in part to the packet, at least one port of the switch node to be used to facilitate, at least in part, establishment, at least in part, of at least one path for propagation of at least one flow between at least two other nodes in the network. The packet may be generated based at least in part upon (1) at least one application classification, (2) at least one allocation request, and (3) network resource availability information.Type: GrantFiled: July 10, 2017Date of Patent: August 13, 2019Assignee: Intel CorporationInventors: Iosif Gasparakis, Mark D. Gray
-
Patent number: 10361914Abstract: Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.Type: GrantFiled: July 3, 2018Date of Patent: July 23, 2019Assignee: Intel CorporationInventors: Iosif Gasparakis, Ronen Chayat, John Fastabend
-
Publication number: 20190158412Abstract: Technologies for aligning network flows to processing resources include a computing device having multiple processing nodes, a network switch, and a network controller operating in a software-defined network. Each processing node of the computing device may include a processor, memory, and network adapter. The network switch may receive a network packet and request forwarding information from the network controller. The network controller may determine flow information corresponding to the network packet that indicates the application targeted by the network packet and the processing node executing the application. The flow information may be transmitted to the computing device, which may program a flow filter in the network adapter of the processing node executing the application.Type: ApplicationFiled: January 28, 2019Publication date: May 23, 2019Inventors: Iosif Gasparakis, Brian P. Johnson, Patrick G. Kutch
-
Publication number: 20190044828Abstract: Technologies for managing cache quality of service (QoS) include a compute node that includes a network interface controller (NIC) configured to identify a total amount of available shared cache ways of a last level cache (LLC) of the compute node and identify a destination address for each of a plurality of virtual machines (VMs) managed by the compute node. The NIC is further configured to calculate a recommended amount of cache ways for each workload type associated with VMs based on network traffic to be received by the NIC and processed by each of the VMs, wherein the recommended amount of cache ways includes a recommended amount of hardware I/O LLC cache ways and a recommended amount of isolated LLC cache ways usable to update a cache QoS register that includes the recommended amount of cache ways for each workload type. Other embodiments are described herein.Type: ApplicationFiled: September 25, 2018Publication date: February 7, 2019Inventors: Iosif Gasparakis, Malini Bhandaru, Ranganath Sunku
-
Patent number: 10200292Abstract: Technologies for aligning network flows to processing resources include a computing device having multiple processing nodes, a network switch, and a network controller operating in a software-defined network. Each processing node of the computing device may include a processor, memory, and network adapter. The network switch may receive a network packet and request forwarding information from the network controller. The network controller may determine flow information corresponding to the network packet that indicates the application targeted by the network packet and the processing node executing the application. The flow information may be transmitted to the computing device, which may program a flow filter in the network adapter of the processing node executing the application.Type: GrantFiled: August 25, 2014Date of Patent: February 5, 2019Assignee: Intel CorporationInventors: Iosif Gasparakis, Brian P. Johnson, Patrick G. Kutch
-
Patent number: 10193760Abstract: One embodiment provides a network interface controller. The network interface controller includes a portion of a hybrid software-defined networking (“SDN”) controller, the portion of the hybrid SDN controller including a service abstraction layer module (“SAL”) and a southbound application programming interface (“SB API”), the SAL including a representation of a physical network.Type: GrantFiled: August 22, 2017Date of Patent: January 29, 2019Assignee: Intel CorporationInventor: Iosif Gasparakis
-
Patent number: 10178054Abstract: Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.Type: GrantFiled: April 1, 2016Date of Patent: January 8, 2019Assignee: Intel CorporationInventors: Stephen T. Palermo, Iosif Gasparakis, Scott P. Dubal, Kapil Sood, Trevor Cooper, Jr-Shian Tsai, Jesse C. Brandeburg, Andrew J. Herdrich, Edwin Verplanke
-
Publication number: 20180337850Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.Type: ApplicationFiled: December 18, 2017Publication date: November 22, 2018Inventors: Nrupal Jani, Dinesh Kumar, Christian Maciocco, Ren Wang, Neerav Parikh, John Fastabend, Iosif Gasparakis, David J. Harriman, Patrick L. Connor, Sanjeev Jain
-
Patent number: 10127072Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.Type: GrantFiled: January 18, 2018Date of Patent: November 13, 2018Assignee: Intel CorporationInventors: Stephen T. Palermo, Scott P. Dubal, Trevor Cooper, Anjali S. Jain, Iosif Gasparakis, Jr-Shian Tsai, Mike Bursell, Pradeepsunder Ganesh, Parthasarathy Sarangam, Jesse C. Brandeburg
-
Publication number: 20180316549Abstract: Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.Type: ApplicationFiled: July 3, 2018Publication date: November 1, 2018Inventors: Iosif Gasparakis, Ronen Chayat, John Fastabend
-
Patent number: 10091063Abstract: Technologies to monitor and manage platform, device, processor and power characteristics throughout a system utilizing a remote entity such as controller node. By remotely monitoring and managing system operation and performance over time, future system performance requirements may be anticipated, allowing system parameters to be adjusted proactively in a more coordinated way. The controller node may monitor, control and predict traffic flows in the system and provide performance modification instructions to any of the computer nodes and a network switch to better optimize performance. The target systems collaborate with the controller node by respectively monitoring internal resources, such as resource availability and performance requirements to provide necessary resources for optimizing operating parameters of the system.Type: GrantFiled: December 27, 2014Date of Patent: October 2, 2018Assignee: INTEL CORPORATIONInventors: Alexander W. Min, Ira Weiny, Patrick Connor, Jr-Shian Tsai, Tsung-Yuan C. Tai, Brian J. Skerry, Jr., Iosif Gasparakis, Steven R. Carbonari, Daniel J. Dahle, Thomas M. Slaight, Nrupal R. Jani
-
Publication number: 20180278683Abstract: Generally discussed herein are systems, devices, and methods for data distribution in a distributed data processing system (DDPS). A device of a distributed data processing system may include a storage device to store data regarding data nodes (DNs), switches, and racks on which the DNs and at least some of the switches reside, and circuitry to receive, from a name node or a client node of the DDPS and coupled to the device, a first communication indicating one or more DNs to which a portion of a file is to be replicated, determine a component in a data path between the client node and one or more of the DNs at which to mirror the portion of the file, and provide a second communication indicating the component at which the data is to be mirrored, one or more of the DNs to receive the portion of the tile, and the corresponding one or more of the racks on which the DNs reside.Type: ApplicationFiled: March 21, 2017Publication date: September 27, 2018Inventors: Praveen Mala, Iosif Gasparakis
-
Patent number: 10015048Abstract: Technologies for controlling operation of a compute node coupled to a computer network via a computing device that includes communications for communicating with the computer network and persistent instructions such as firmware for providing control functions to the computing device, wherein the control functions being defined at least in part by protocol data. An update control module of the computing device may receive update data from a remote node in the computer network via the communications, wherein the update data comprising new protocol data for the persistent instructions. A protocol parser module may parse the update data and generate metadata relating to the update data. A classifier module may receive rules for the control functions, wherein the rules are based at least in part on the update data and metadata. A compiler may compile the parsed update data to the persistent instructions for providing new control functions to the computing device based at least in part on the received rules.Type: GrantFiled: December 27, 2014Date of Patent: July 3, 2018Assignee: Intel CorporationInventors: Iosif Gasparakis, Ronen Chayat, John Fastabend
-
Publication number: 20180181421Abstract: An example computer system for transferring a packet includes a hypervisor to run a first virtual machine and a second virtual machine. The computer system also includes a first memory address space associated with the first virtual machine to store the packet. The computer system further includes a second memory address space associated with the second virtual machine to receive and store the packet. The computer system also includes a virtual switch coupled to the first virtual machine and the second virtual machine to detect that the packet is to be sent from the first virtual machine to the second virtual machine. The computer system further includes a direct memory access device to copy the packet from the first memory address space to the second memory address space via the direct memory access device.Type: ApplicationFiled: December 27, 2016Publication date: June 28, 2018Inventors: Patrick Connor, Scott P. Dubal, James R. Hearn, Iosif Gasparakis, Chris Pavlas, Eliezer Tamir
-
Publication number: 20180143846Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.Type: ApplicationFiled: January 18, 2018Publication date: May 24, 2018Applicant: Intel CorporationInventors: STEPHEN T. PALERMO, SCOTT P. DUBAL, TREVOR COOPER, ANJALI S. JAIN, IOSIF GASPARAKIS, JR-SHIAN TSAI, MIKE BURSELL, PRADEEPSUNDER GANESH, PARTHASARATHY SARANGAM, JESSE C. BRANDEBURG
-
Patent number: 9910692Abstract: The present disclosure is directed to enhanced virtual function capabilities in a virtualized network environment. In general, devices may comprise physical and virtualized resources. The physical resources may comprise at least a network adaptor that may handle incoming data from a network and outgoing data to the network. The virtualized resources may comprise at least one virtual machine (VM) and a corresponding interface. The corresponding interface may be one of a physical interface, a virtual interface or a “super” virtual interface. The physical interface may provide a first set of capabilities allowing the VM to access (e.g., control) at least the network adaptor. The virtual interface may provide a second set of capabilities that is a subset of the first set. The super virtual interface may provide a third set of capabilities including the second set of capabilities and at least one additional capability from the first set of capabilities.Type: GrantFiled: January 26, 2016Date of Patent: March 6, 2018Assignee: Intel CorporationInventors: Stephen T. Palermo, Scott P. Dubal, Trevor Cooper, Anjali S. Jain, Iosif Gasparakis, Jr-Shian Tsai, Mike Bursell, Pradeepsunder Ganesh, Parthasarathy Sangam, Jesse C. Brandeburg
-
Patent number: 9847936Abstract: Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.Type: GrantFiled: June 25, 2015Date of Patent: December 19, 2017Assignee: Intel CorporationInventors: Nrupal Jani, Dinesh Kumar, Christian Maciocco, Ren Wang, Neerav Parikh, John Fastabend, Iosif Gasparakis, David J. Harriman, Patrick L. Connor, Sanjeev Jain
-
Publication number: 20170353359Abstract: One embodiment provides a network interface controller. The network interface controller includes a portion of a hybrid software-defined networking (“SDN”) controller, the portion of the hybrid SDN controller including a service abstraction layer module (“SAL”) and a southbound application programming interface (“SB API”), the SAL including a representation of a physical network.Type: ApplicationFiled: August 22, 2017Publication date: December 7, 2017Applicant: Intel CorporationInventor: IOSIF GASPARAKIS
-
Publication number: 20170310600Abstract: An embodiment may include circuitry to be included, at least in part, in at least one node in a network. The circuitry may generate, at least in part, and/or receive, at least in part, at least one packet. The packet may be received, at least in part, by at least one switch node in the network. The switch node may designate, in response at least in part to the packet, at least one port of the switch node to be used to facilitate, at least in part, establishment, at least in part, of at least one path for propagation of at least one flow between at least two other nodes in the network. The packet may be generated based at least in part upon (1) at least one application classification, (2) at least one allocation request, and (3) network resource availability information.Type: ApplicationFiled: July 10, 2017Publication date: October 26, 2017Inventors: Iosif Gasparakis, Mark D. Gray
-
Publication number: 20170289068Abstract: Methods and apparatus for accelerating VM-to-VM Network Traffic using CPU cache. A virtual queue manager (VQM) manages data that is to be kept in VM-VM shared data buffers in CPU cache. The VQM stores a list of VM-VM allow entries identifying data transfers between VMs that may use VM-VM cache “fast-path” forwarding. Packets are sent from VMs to the VQM for forwarding to destination VMs. Indicia in the packets (e.g., in a tag or header) is inspected to determine whether a packet is to be forwarded via a VM-VM cache fast path or be forwarded via a virtual switch. The VQM determines the VM data already in the CPU cache domain while concurrently coordinating with the data to and from the external shared memory, and also ensures data coherency between data kept in cache and that which is kept in shared memory.Type: ApplicationFiled: April 1, 2016Publication date: October 5, 2017Inventors: Stephen T. Palermo, Iosif Gasparakis, Scott P. Dubal, Kapil Sood, Trevor Cooper, Jr-Shian Tsai, Jesse C. Brandeburg, Andrew J. Herdrich, Edwin Verplanke