Patents by Inventor Iouri Oboukhov
Iouri Oboukhov has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11513895Abstract: A data storage device is disclosed comprising a non-volatile storage medium (NVSM). Problematic patterns in a block of input data are identified, and the problematic patterns are relocated from an initial location to an erasure region of the block to generate a modified block. The modified block is erasure encoded into an erasure codeword, at least part of the erasure codeword is stored in the NVSM.Type: GrantFiled: June 11, 2021Date of Patent: November 29, 2022Assignee: Western Digital Technologies, Inc.Inventors: Iouri Oboukhov, Richard L. Galbraith, Jonas A. Goode
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Publication number: 20220376711Abstract: Example systems, read channels, and methods provide bit value detection from an encoded data signal using a neural network soft information detector. The neural network detector determines a set of probabilities for possible states of a data symbol from the encoded data signal. A soft output detector uses the set of probabilities for possible states of the data symbol to determine a set of bit probabilities that are iteratively exchanged as extrinsic information with an iterative decoder for making decoding decisions. The iterative decoder outputs decoded bit values for a data unit that includes the data symbol.Type: ApplicationFiled: September 21, 2021Publication date: November 24, 2022Inventors: Iouri Oboukhov, Daniel Bedau, Richard Galbraith, Niranjay Ravindran, Weldon Hanson, Pradhan Bellam
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Patent number: 11487611Abstract: The present disclosure generally relates to applying LDPC coding to memory cells with an arbitrary number of levels. Modulation code is applied to a first portion of user bits. The coded user data is stored in a first modulation block. Parity bits are then generated for the first portion of user bits. The parity bits are then stored in a second modulation block different from the first modulation block. Modulation code is then applied to a second portion of user bits which are stored in the second modulation block. Parity bits are then generated for the second portion of user bits and stored in a third modulation block. The parity bits are thus embedded in a separate modulation block from the modulation block where the user data is stored.Type: GrantFiled: February 23, 2021Date of Patent: November 1, 2022Assignee: Western Digital Technologies, Inc.Inventors: Iouri Oboukhov, Richard Galbraith, Jonas Goode, Niranjay Ravindran
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Patent number: 11411584Abstract: A data storage device is disclosed comprising a non-volatile storage medium (NVSM). A first block of data is channel encoded into first channel data based on a channel code constraint, and the first channel data is error correction encoded to generate first redundancy bits. A second block of data is channel encoded into second channel data based on the channel code constraint and the first redundancy bits, and the first channel data and the second channel data are error correction encode to generate second redundancy bits. A third block of data is channel encoded into third channel data based on the channel code constraint and the second redundancy bits. The first, second and third channel data and the first and second redundancy bits are stored in the NVSM.Type: GrantFiled: February 19, 2021Date of Patent: August 9, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Iouri Oboukhov, Richard L. Galbraith, Niranjay Ravindran
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Patent number: 11386927Abstract: A data storage device configured to access a magnetic tape is disclosed comprising a plurality of data tracks. A first head is configured to access a first data track comprising a first sync mark, and a second head is configured to access a second data track comprising a second sync mark. The first head is used to read first data from the first data track, wherein the first data comprises a plurality of symbols, and the second head is used to read the second sync mark from the second data track. The first data is symbol synchronized based on the second head reading the second sync mark from the second data track.Type: GrantFiled: May 26, 2021Date of Patent: July 12, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Derrick E. Burton, Weldon M. Hanson, Richard L. Galbraith, Iouri Oboukhov
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Publication number: 20220107865Abstract: The present disclosure generally relates to applying LDPC coding to memory cells with an arbitrary number of levels. Modulation code is applied to a first portion of user bits. The coded user data is stored in a first modulation block. Parity bits are then generated for the first portion of user bits. The parity bits are then stored in a second modulation block different from the first modulation block. Modulation code is then applied to a second portion of user bits which are stored in the second modulation block. Parity bits are then generated for the second portion of user bits and stored in a third modulation block. The parity bits are thus embedded in a separate modulation block from the modulation block where the user data is stored.Type: ApplicationFiled: February 23, 2021Publication date: April 7, 2022Inventors: Iouri OBOUKHOV, Richard GALBRAITH, Jonas GOODE, Niranjay RAVINDRAN
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Publication number: 20220103188Abstract: A data storage device is disclosed comprising a non-volatile storage medium (NVSM). A first block of data is channel encoded into first channel data based on a channel code constraint, and the first channel data is error correction encoded to generate first redundancy bits. A second block of data is channel encoded into second channel data based on the channel code constraint and the first redundancy bits, and the first channel data and the second channel data are error correction encode to generate second redundancy bits. A third block of data is channel encoded into third channel data based on the channel code constraint and the second redundancy bits. The first, second and third channel data and the first and second redundancy bits are stored in the NVSM.Type: ApplicationFiled: February 19, 2021Publication date: March 31, 2022Inventors: IOURI OBOUKHOV, RICHARD L. GALBRAITH, NIRANJAY RAVINDRAN
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Patent number: 11289123Abstract: An external servo writer configured to write a plurality of embedded servo sectors on a magnetic tape to define a plurality of data tracks is disclosed. A first part of the plurality of embedded servo sectors is written while controlling an actuator to first move a head vertically along a width of the magnetic tape. A second part of the plurality of embedded servo sectors is written while controlling the actuator to second move the head vertically along the width of the magnetic tape.Type: GrantFiled: June 17, 2021Date of Patent: March 29, 2022Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Richard L. Galbraith, Weldon M. Hanson, Derrick E. Burton, Niranjay Ravindran, Iouri Oboukhov
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Publication number: 20210350825Abstract: An external servo writer configured to write a plurality of embedded servo sectors on a magnetic tape to define a plurality of data tracks is disclosed. A first part of the plurality of embedded servo sectors is written while controlling an actuator to first move a head vertically along a width of the magnetic tape. A second part of the plurality of embedded servo sectors is written while controlling the actuator to second move the head vertically along the width of the magnetic tape.Type: ApplicationFiled: June 17, 2021Publication date: November 11, 2021Inventors: RICHARD L. GALBRAITH, WELDON M. HANSON, DERRICK E. BURTON, NIRANJAY RAVINDRAN, IOURI OBOUKHOV
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Patent number: 11138996Abstract: A data storage device is disclosed comprising at least one head configured to access a magnetic tape comprising a plurality of data tracks, wherein each data track comprises a plurality of data segments and a plurality of servo sectors. The head is used to read one of the servo sectors to generate a first read signal. The first read signal is processed to generate a position error signal (PES) of the head relative to the magnetic tape, wherein the head is positioned relative to the magnetic tape based on the PES. The head is used to read one of the data segments to generate a second read signal, wherein the second read signal is processed to detect user data recorded in the data segment.Type: GrantFiled: May 8, 2020Date of Patent: October 5, 2021Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Richard L. Galbraith, Weldon M. Hanson, Derrick E. Burton, Niranjay Ravindran, Iouri Oboukhov
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Patent number: 11055171Abstract: A data storage device is disclosed comprising a head actuated over a disk. A first plurality of codewords and corresponding parity sector are generated, and a second plurality of codewords and corresponding parity sector are generated. The first and second plurality of codewords are written to the disk, and during a read of the first and second set of codewords, M codeword locations within the data track that are unrecoverable are saved, and N codeword locations out of the M codeword locations are selected based on a quality metric of the read. The N codewords are reread from the data track at the N codeword locations and reliability metrics associated with the N codewords are saved. The saved reliability metrics are updated using at least one of the first parity sector or the second parity sector.Type: GrantFiled: March 11, 2020Date of Patent: July 6, 2021Assignee: Western Digital Technologies, Inc.Inventors: Niranjay Ravindran, Weldon M. Hanson, Richard L. Galbraith, David T. Flynn, Iouri Oboukhov
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Patent number: 11049520Abstract: A data storage device is disclosed comprising at least one head configured to access a magnetic tape. Data is read from the magnetic tape to generate a read signal which is processed to decode a first M blocks of low density parity check (LDPC) type codewords using a LDPC type decoder. First un-converged codewords out of the first M blocks are decoded using a first M-blocks parity, and second un-converged codewords out of the first M blocks are decoded using an erasure code.Type: GrantFiled: May 8, 2020Date of Patent: June 29, 2021Assignee: Western Digital Technologies, Inc.Inventors: Richard L. Galbraith, Weldon M. Hanson, Derrick E. Burton, Niranjay Ravindran, Iouri Oboukhov
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Patent number: 10897271Abstract: The disclosure relates in some aspects to multi-dimensional quasi-cyclic (QC) low-density parity-check (LDPC) code generation. In one example, a controller of a data storage apparatus determines a plurality of dimensions for a code, the plurality of dimensions comprising a plurality of coprime numbers, generates distinct circulant rotation values based on at least a root of unity number and a prime number, assigns a different one of the distinct circulant rotation values to each of a plurality of circulant locations defined within the plurality of dimensions to generate the code, and encodes data using the code.Type: GrantFiled: October 4, 2018Date of Patent: January 19, 2021Assignee: WESTERN DIGITAL TECHNOLOGIES, INC.Inventors: Richard Leo Galbraith, Iouri Oboukhov, Niranjay Ravindran
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Publication number: 20200210277Abstract: A data storage device is disclosed comprising a head actuated over a disk. A first plurality of codewords and corresponding parity sector are generated, and a second plurality of codewords and corresponding parity sector are generated. The first and second plurality of codewords are written to the disk, and during a read of the first and second set of codewords, M codeword locations within the data track that are unrecoverable are saved, and N codeword locations out of the M codeword locations are selected based on a quality metric of the read. The N codewords are reread from the data track at the N codeword locations and reliability metrics associated with the N codewords are saved. The saved reliability metrics are updated using at least one of the first parity sector or the second parity sector.Type: ApplicationFiled: March 11, 2020Publication date: July 2, 2020Inventors: NIRANJAY RAVINDRAN, WELDON M. HANSON, RICHARD L. GALBRAITH, DAVID T. FLYNN, IOURI OBOUKHOV
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Publication number: 20200112322Abstract: The disclosure relates in some aspects to multi-dimensional quasi-cyclic (QC) low-density parity-check (LDPC) code generation. In one example, a controller of a data storage apparatus determines a plurality of dimensions for a code, the plurality of dimensions comprising a plurality of coprime numbers, generates distinct circulant rotation values based on at least a root of unity number and a prime number, assigns a different one of the distinct circulant rotation values to each of a plurality of circulant locations defined within the plurality of dimensions to generate the code, and encodes data using the code.Type: ApplicationFiled: October 4, 2018Publication date: April 9, 2020Inventors: Richard Leo Galbraith, Iouri Oboukhov, Niranjay Ravindran
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Patent number: 10606699Abstract: A data storage device is disclosed wherein a first plurality of codewords are generated each comprising a plurality of symbols, and a first parity sector is generated over the first plurality of codewords. A second plurality of codewords are generated each comprising a plurality of symbols, and a second parity sector is generated over the second plurality of codewords. A third parity sector is generated over a first subset of the first plurality of codewords and a first subset of the second plurality of codewords, and a fourth parity sector is generated over a second subset of the first plurality of codewords and a second subset of the second plurality of codewords. When processing of a first codeword fails, the first codeword and the first parity sector are processed using a LDPC type decoder, and the first codeword and the third parity sector are processed using the LDPC type decoder.Type: GrantFiled: January 10, 2019Date of Patent: March 31, 2020Assignee: Western Digital Technologies, Inc.Inventors: Iouri Oboukhov, Weldon M. Hanson, Niranjay Ravindran, David T. Flynn
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Patent number: 10592334Abstract: A data storage device is disclosed comprising a non-volatile storage medium (NVSM), wherein a plurality of codewords and corresponding parity sector are written to the NVSM and then read from the NVSM. Each codeword read from the NVSM is processed using a Viterbi-type detector, thereby generating codeword reliability metrics. The codeword reliability metrics for at least some of the codewords are processed using a low density parity check (LDPC) type decoder, thereby generating a LDPC reliability metric for each symbol of at least one codeword. The LDPC reliability metrics for at least one of an un-converged codeword are processed using the parity sector, thereby updating the un-converged codeword reliability metrics. Processing the codeword reliability metrics with the LDPC decoder and updating the reliability metrics with the parity sector is repeated at least once before updating the LDPC reliability metrics of at least the un-converged codeword using the Viterbi-type detector.Type: GrantFiled: May 17, 2018Date of Patent: March 17, 2020Assignee: Western Digital Technologies, Inc.Inventors: Iouri Oboukhov, Niranjay Ravindran, Richard L. Galbraith
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Patent number: 10530390Abstract: A data storage device is disclosed comprising a head actuated over a disk comprising a data track having at least a first data segment and a second data segment. A first plurality of codewords are generated, and a first parity sector is generated over the first plurality of codewords. The first plurality of codewords and the first parity sector are written to the first data segment. A second plurality of codewords are generated, and a second parity sector is generated over the second plurality of codewords. The second plurality of codewords and the second parity sector are written to the second data segment. During a read operation the data segments of the data track are processed sequentially to decode the codewords using a low density parity check (LDPC) decoder, wherein the reliability metrics of un-converged codewords are stored in a codeword buffer and updated using the respective parity sector.Type: GrantFiled: May 17, 2018Date of Patent: January 7, 2020Assignee: Western Digital Technologies, Inc.Inventors: Iouri Oboukhov, Weldon M. Hanson, Niranjay Ravindran, Richard L. Galbraith
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Publication number: 20190356334Abstract: A data storage device is disclosed comprising a head actuated over a disk comprising a data track having at least a first data segment and a second data segment. A first plurality of codewords are generated, and a first parity sector is generated over the first plurality of codewords. The first plurality of codewords and the first parity sector are written to the first data segment. A second plurality of codewords are generated, and a second parity sector is generated over the second plurality of codewords. The second plurality of codewords and the second parity sector are written to the second data segment. During a read operation the data segments of the data track are processed sequentially to decode the codewords using a low density parity check (LDPC) decoder, wherein the reliability metrics of un-converged codewords are stored in a codeword buffer and updated using the respective parity sector.Type: ApplicationFiled: May 17, 2018Publication date: November 21, 2019Inventors: IOURI OBOUKHOV, WELDON M. HANSON, NIRANJAY RAVINDRAN, RICHARD L. GALBRAITH
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Publication number: 20190354430Abstract: A data storage device is disclosed comprising a non-volatile storage medium (NVSM), wherein a plurality of codewords and corresponding parity sector are written to the NVSM and then read from the NVSM. Each codeword read from the NVSM is processed using a Viterbi-type detector, thereby generating codeword reliability metrics. The codeword reliability metrics for at least some of the codewords are processed using a low density parity check (LDPC) type decoder, thereby generating a LDPC reliability metric for each symbol of at least one codeword. The LDPC reliability metrics for at least one of an un-converged codeword are processed using the parity sector, thereby updating the un-converged codeword reliability metrics. Processing the codeword reliability metrics with the LDPC decoder and updating the reliability metrics with the parity sector is repeated at least once before updating the LDPC reliability metrics of at least the un-converged codeword using the Viterbi-type detector.Type: ApplicationFiled: May 17, 2018Publication date: November 21, 2019Inventors: IOURI OBOUKHOV, NIRANJAY RAVINDRAN, RICHARD L. GALBRAITH