Abstract: The present disclosure provides a clock and data recovery processor for recovering timing information from a measured signal with a data input interface configured to receive samples representing the measured signal, a level comparator coupled to the data input interface and configured to determine the signal level for each of the received samples in a group comprising a predetermined number of samples, a transition comparator coupled to the level comparator and configured to compare the number of signal transitions for the samples in the group with a predetermined transition number, and a bit value determiner coupled to the transition comparator and configured to determine bit values for data symbols in the measured signal based on the detected transitions, if the transition comparator determined the number of signal transitions being equal to or larger than the predetermined transition number. Further, the present disclosure provides a measurement device and a respective method.

Abstract: The present disclosure provides a clock and data recovery processor for recovering timing information from a measured signal with a data input interface configured to receive samples representing the measured signal, a level comparator coupled to the data input interface and configured to determine the signal level for each of the received samples in a group comprising a predetermined number of samples, a transition comparator coupled to the level comparator and configured to compare the number of signal transitions for the samples in the group with a predetermined transition number, and a bit value determiner coupled to the transition comparator and configured to determine bit values for data symbols in the measured signal based on the detected transitions, if the transition comparator determined the number of signal transitions being equal to or larger than the predetermined transition number. Further, the present disclosure provides a measurement device and a respective method.

Abstract: A signal analysis method for analyzing a pulse modulated input signal is described. The signal analysis method includes: receiving the pulse modulated input signal, the input signal including a symbol sequence; recovering a clock signal from the input signal, the clock signal being associated with the input signal; sampling the input signal based on the clock signal, thereby obtaining a set of input signal samples, each of the input signal samples having a certain level being constant over time; determining at least two different levels of input signal samples being associated with different symbols of the symbol sequence; and determining at least one decision threshold based on the at least two different levels determined previously, the decision threshold being associated with a symbol transition of the symbol sequence. Further, a signal analysis apparatus is described.

Abstract: A signal analysis method for analyzing a pulse modulated input signal is described. The signal analysis method includes: receiving the pulse modulated input signal, the input signal including a symbol sequence; recovering a clock signal from the input signal, the clock signal being associated with the input signal; sampling the input signal based on the clock signal, thereby obtaining a set of input signal samples, each of the input signal samples having a certain level being constant over time; determining at least two different levels of input signal samples being associated with different symbols of the symbol sequence; and determining at least one decision threshold based on the at least two different levels determined previously, the decision threshold being associated with a symbol transition of the symbol sequence. Further, a signal analysis apparatus is described.