Abstract: A method and device for data conversion in a matrix compute apparatus. The apparatus includes an input buffer (IB) that receives one or more matrix inputs characterized by a first format and a compute device coupled to the IB device that is configured to determine a combined matrix output. The compute device determines a first matrix output using a first input portion of the matrix input and determines a second matrix output using a second input portion. The compute device then determines a combined matrix output in a second format using the first and second matrix outputs. Within the compute device, an alignment device can determine a rounded matrix output from the combined matrix output, and a partial products reduction (PPR) device can determine a reduced matrix output in a third format using the rounded matrix output, which is stored in an output buffer (OB) coupled to the compute device.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for a CMOS interpolator for an output clock signal with a desirable phase for a high speed serializer/deserializer device. In a specific embodiment, the present invention provides a phase interpolator device that mixes phase-shifted clock signals according to a predetermined weight values at predetermined time intervals. There are other embodiments as well.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for a CMOS interpolator for an output clock signal with a desirable phase for a high speed serializer/deserializer device. In a specific embodiment, the present invention provides a phase interpolator device that mixes phase-shifted clock signals according to a predetermined weight values at predetermined time intervals. There are other embodiments as well.

Abstract: The present invention relates generally to integrated circuits. More particularly, the present invention provides a circuit and method for a CMOS interpolator for an output clock signal with a desirable phase for a high speed serializer/deserializer device. In a specific embodiment, the present invention provides a phase interpolator device that mixes phase-shifted clock signals according to a predetermined weight values at predetermined time intervals. There are other embodiments as well.

Abstract: In an example, the present invention provides an analog to digital converter device for a high speed data transmission from 1 GS-s to 100 GS-s, although there can be other variations. In an example, the device has an input receiver device coupled to a transimpedance amplifier. In an example, the transimpedance amplifier is coupled to an input stream of data at 10 GHz to 100 GHz, or other variations.

Abstract: This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

Abstract: In an example, the present invention provides an analog to digital converter device for a high speed data transmission from 1 GS-s to 100 GS-s, although there can be other variations. In an example, the device has an input receiver device coupled to a transimpedance amplifier. In an example, the transimpedance amplifier is coupled to an input stream of data at 10 GHz to 100 GHz, or other variations.

Abstract: In an example, the present invention provides an analog to digital converter device for a high speed data transmission from 1 GS-s to 100 GS-s, although there can be other variations. In an example, the device has an input receiver device coupled to a transimpedance amplifier. In an example, the transimpedance amplifier is coupled to an input stream of data at 10 GHz to 100 GHz, or other variations.

Abstract: This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

Abstract: This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

Abstract: This disclosure relates to the field of amplifiers for multi-level optical communication and more particularly to techniques for trans-impedance amplifiers (TIA) with gain control. The claimed embodiments address the problem of implementing a low cost TIA that exhibits high linearity, low noise, low power, and wide bandwidth. More specifically, some claims are directed to approaches for providing TIA gain control using a plurality of inverter-based replica gain control cells controlled by a feedback loop to manage the current into the amplifying output stage and thereby the TIA output voltage.

Abstract: A method of controlling a laser diode measures an average light output power of the laser diode and compares the average light output power to a desired average light output power within a target range. If the average light output power is not within the target range, the slope efficiency is determined by measuring two light output powers at two different bias conditions. Each of the two light output powers is greater than a selected minimum light output power, which insures that each measurement occurs within the slope efficiency portion of the laser diode curve. A new bias current for the laser diode is calculated based on the measured slope efficiency so as to produce a new average light output power within the target range.

Abstract: In one embodiment, the linear gain region of a preamp is widened by performing the following actions within the preamp: converting a received input current to a first voltage; in accordance with one of a plurality of discrete gain states, amplifying the first voltage to produce a second voltage; in response to the received input current crossing one or more thresholds, switching the gain state used for amplifying the first voltage; and outputting an indication of the preamp's current gain state. Preamps for performing this and other methods are also disclosed.

Abstract: A method of controlling a laser diode measures an average light output power of the laser diode and compares the average light output power to a desired average light output power within a target range. If the average light output power is not within the target range, the slope efficiency is determined by measuring two light output powers at two different bias conditions. Each of the two light output powers is greater than a selected minimum light output power, which insures that each measurement occurs within the slope efficiency portion of the laser diode curve. A new bias current for the laser diode is calculated based on the measured slope efficiency so as to produce a new average light output power within the target range.

Abstract: Stability compensation for an amplifier with adjustable gain is provided via adjustable capacitance coupled to an input of a gain element within the amplifier. Gain of the amplifier is adjusted by an adjustable resistance coupled between the input and output of the gain element. The adjustable capacitance and the adjustable resistance determine the frequency of a dominant pole of the amplifier.

Abstract: In one embodiment, the linear gain region of a preamp is widened by performing the following actions within the preamp: converting a received input current to a first voltage; in accordance with one of a plurality of discrete gain states, amplifying the first voltage to produce a second voltage; in response to the received input current crossing one or more thresholds, switching the gain state used for amplifying the first voltage; and outputting an indication of the preamp's current gain state. Preamps for performing this and other methods are also disclosed.

Abstract: Stability compensation for an amplifier with adjustable gain is provided via adjustable capacitance coupled to an input of a gain element within the amplifier. Gain of the amplifier is adjusted by an adjustable resistance coupled between the input and output of the gain element. The adjustable capacitance and the adjustable resistance determine the frequency of a dominant pole of the amplifier.

Abstract: A photo-receiver arrangement includes a photo-sensor that captures light being incident thereon within a predetermined range of light intensity values. The photo-sensor also converts the captured incident light into a first electrical signal. A pre-scaler is connected to an output of the photo-sensor for producing a second scaled electrical signal based on and corresponding to said first electrical signal input into the pre-scaler; and a preamplifier is connected to an output of the pre-scaler for amplifying said second scaled electrical signal input into the preamplifier. The preamplifier has a dynamic range of at least substantially linear gain. The pre-scaler and the preamplifier are designed in a mutually matching configuration such that the second scaled electrical signal falls within the said dynamic range of the preamplifier for any light intensity value falling into said predetermined range of light intensity values.

Abstract: A photo-receiver arrangement includes a photo-sensor that captures light being incident thereon within a predetermined range of light intensity values. The photo-sensor also converts the captured incident light into a first electrical signal. A pre-scaler is connected to an output of the photo-sensor for producing a second scaled electrical signal based on and corresponding to said first electrical signal input into the pre-scaler; and a preamplifier is connected to an output of the pre-scaler for amplifying said second scaled electrical signal input into the preamplifier. The preamplifier has a dynamic range of at least substantially linear gain. The pre-scaler and the preamplifier are designed in a mutually matching configuration such that the second scaled electrical signal falls within the said dynamic range of the preamplifier for any light intensity value falling into said predetermined range of light intensity values.