Patents by Inventor Irene Yuh-Ling Lin

Irene Yuh-Ling Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Methods, apparatus and system for a passthrough-based architecture
    Patent number: 10559503
    Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.
    Type: Grant
    Filed: October 9, 2017
    Date of Patent: February 11, 2020
    Assignee: GLOBALFOUNDRIES INC.
    Inventors: Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jongwook Kye, Jason Eugene Stephens, Irene Yuh-Ling Lin, Sudharshanan Raghunathan, Lei Yuan
  • METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE
    Publication number: 20180033701
    Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.
    Type: Application
    Filed: October 9, 2017
    Publication date: February 1, 2018
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jongwook Kye, Jason Eugene Stephens, Irene Yuh-Ling Lin, Sudharshanan Raghunathan, Lei Yuan
  • Methods, apparatus and system for a passthrough-based architecture
    Patent number: 9818651
    Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.
    Type: Grant
    Filed: March 11, 2016
    Date of Patent: November 14, 2017
    Assignee: GlobalFoundries Inc.
    Inventors: Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jongwook Kye, Jason Eugene Stephens, Irene Yuh-Ling Lin, Sudharshanan Raghunathan, Lei Yuan
  • METHODS, APPARATUS AND SYSTEM FOR A PASSTHROUGH-BASED ARCHITECTURE
    Publication number: 20170263506
    Abstract: At least one method, apparatus and system disclosed herein for forming a finFET device having a pass-through structure. A first gate structure and a second gate structure are formed on a semiconductor wafer. A first active area is formed on one end of the first and second gate structures. A second active area is formed on the other end of the first and second gate structures. A trench silicide (TS) structure self-aligned to the first and second gate structures is formed. The TS structure is configured to operatively couple the first active area to the second active area.
    Type: Application
    Filed: March 11, 2016
    Publication date: September 14, 2017
    Applicant: GLOBALFOUNDRIES INC.
    Inventors: Guillaume Bouche, Tuhin Guha Neogi, Andy Chi-Hung Wei, Jia Zeng, Jongwook Kye, Jason Eugene Stephens, Irene Yuh-Ling Lin, Sudharshanan Raghunathan, Lei Yuan
  • Standard cell connection for circuit routing
    Patent number: 9035679
    Abstract: Embodiments described herein provide approaches for improving a standard cell connection for circuit routing. Specifically, provided is an IC device having a plurality of cells, a first metal layer (M1) pin coupled to a contact bar extending from a first cell of the plurality of cells, and a second metal layer (M2) wire coupled to the contact bar, wherein the contact bar extends across at least one power rail. By extending the contact bar into an open area between the plurality of cells to couple the M1 pin and the M2 wire, routing efficiency and chip scaling are improved.
    Type: Grant
    Filed: May 3, 2013
    Date of Patent: May 19, 2015
    Assignee: GLOBALFOUNDRIES Inc.
    Inventors: Lei Yuan, Mahbub Rashed, Irene Yuh-Ling Lin, Jongwook Kye