Abstract: A lateral semiconductor device (20) such as LDMOS, a LIGBT, a lateral diode, a lateral GTO, a lateral JFET or a lateral BJT, comprising a drift region (12) having a first surface (22) and a first conductivity type, first and second conductive (4, 8) extending into the drift region from the first surface. The lateral semiconductor device further comprises an additional region (24) or several additional regions, having a second conductivity type, between the first and second semiconductor regions (4, 8), the additional region extending into the drift region from the first surface (22), wherein the additional region forms a junction dividing the electric field between the first and second semiconductor regions when a current path is established between the first and second semiconductor regions. This allows the doping concentration of the drift region to be increased, thereby lowering the on-resistance of the device.

Abstract: A lateral semiconductor device (20) such as LDMOS, a UIGBT, a lateral diode, a lateral GTO, a lateral JFRT or a lateral BJT, comprising a drift region (12) having a first surface (22) and a first conductivity type, first and second conductive regions (4, 8) extending into the drift region from the first surface. The lateral semiconductor device further comprises an additional region (24) or several additional regions, having a second conductivity type, between the first and second semiconductor regions (4, 8), the additional region extending into the drift region from the first surface (22), wherein the additional region forms a junction dividing the electric field between the first and second semiconductor regions when a current path is established between the first and second semiconductor regions. This allows the doping concentration of the drift region to be increased, thereby lowering the on-resistance of the device.

Abstract: A method for forming a direct wafer bonded structure having a buried high temperature metal nitride layer (16) and improved thermal conductivity is provided. By patterning the high temperature metal nitride layer (16) with a non-oxidizing photoresist stripper and absent a photoresist hardening step, adhesion between the high temperature metal nitride layer (16) and a dielectric layer (17, 27) subsequently formed over the high temperature metal nitride layer (16) is significantly improved. The dielectric layer (17, 27) will adhere to the high temperature metal nitride layer (16) in high temperature environments. In addition, a direct wafer bonded structure having a buried high temperature metal nitride layer (16) and improved thermal conductivity is provided. The structure is suitable for power, logic, and high frequency integrated circuit devices.

Abstract: A method of processing a semiconductor device in which a microwave field is generated to surround the semiconductor device while a focussed electron beam or ion beam is applied to the substrate of the device whereby the presence of the electron or ion beam creates a conductive region which increases the microwave field intensity in that region, so that the intensified microwave field creates a local heating effect in the substrate to perform a local annealing action.