Patents by Inventor Iris Jiang

Iris Jiang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and related apparatus for performing error checking-correcting
    Patent number: 7404137
    Abstract: A method and related apparatus for performing error checking-correcting (ECC). The method divides a memory space provided by a memory into an ECC range and a non-ECC range. When data is read or written, the method determines the address of data is within the ECC range or the non-ECC range so as to decide whether error checking-correcting is performed on the data.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: July 22, 2008
    Assignee: VIA Technologies Inc.
    Inventors: Jiing Lin, Iris Jiang, Jie Ding
  • Method and related apparatus for data error checking
    Patent number: 7376886
    Abstract: A method for data error checking includes accessing a plurality of sets of data, each of the sets of data having a plurality of bits; integrating the plurality of sets of data into integral data; generating error checking data according to the integral data, the error checking data being changed following any change of the plurality of sets of data; dividing the error checking data into a plurality of sets of sub-checking data, each set of sub-checking data corresponding to one of the plurality of sets of data; and when transmitting each of the plurality of sets of data in order, transmitting the corresponding sub-checking data in the meantime.
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: May 20, 2008
    Assignee: VIA Technologies Inc.
    Inventors: Jiing Lin, Iris Jiang, Jie Ding
  • METHOD AND RELATED APPARATUS FOR PERFORMING ERROR CHECKING-CORRECTING
    Publication number: 20060117239
    Abstract: A method and related apparatus for performing error checking-correcting (ECC). The method divides a memory space provided by a memory into an ECC range and a non-ECC range. When data is read or written, the method determines the address of data is within the ECC range or the non-ECC range so as to decide whether error checking-correcting is performed on the data.
    Type: Application
    Filed: May 17, 2005
    Publication date: June 1, 2006
    Inventors: Jiing Lin, Iris Jiang, Jie Ding
  • Method And Related Apparatus For Data Error Checking
    Publication number: 20060090117
    Abstract: A method for data error checking includes accessing a plurality of sets of data, each of the sets of data having a plurality of bits; integrating the plurality of sets of data into integral data; generating error checking data according to the integral data, the error checking data being changed following any change of the plurality of sets of data; dividing the error checking data into a plurality of sets of sub-checking data, each set of sub-checking data corresponding to one of the plurality of sets of data; and when transmitting each of the plurality of sets of data in order, transmitting the corresponding sub-checking data in the meantime.
    Type: Application
    Filed: April 19, 2005
    Publication date: April 27, 2006
    Inventors: Jiing Lin, Iris Jiang, Jie Ding