Patents by Inventor Irwin D'Souza
Irwin D'Souza has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11714676Abstract: A value profiling method, system and computer program product that leverages a guarded storage facility. During code execution, a first instruction is loaded. The first instruction has a first value designating a first region of memory and the first instruction is related to a first section of the code. A determination is made as to whether a guarded mode is enabled at the first region. Responsive to an enabled guarded mode at the first region, a secondary operation is triggered. The secondary operation is in addition to a primary operation of the first instruction. The primary operation is relative to the first region of the memory. The secondary operation causes a profiling of the first section of the code.Type: GrantFiled: January 3, 2020Date of Patent: August 1, 2023Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Joran S. C. Siu, Irwin D'Souza, Filip Jeremic, Aleksandar Micic, Evgenia Badiyanova
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Patent number: 11080182Abstract: Systems and methods for object load introspection using guarded storage are disclosed. In embodiments, a computer-implemented method includes: determining objects of interest designated by a user; splitting a first subset of a predetermined memory heap into guarded regions based on a number of objects of interest; allocating each of the objects of interest to a respective one of the guarded regions and remaining objects to a second subset of the predetermined memory heap; executing a program; detecting one of the objects of interest is loaded from one of the guarded regions; generating a trap that transfers control of the executing the program to a signal handler, wherein the signal handler is designated to perform a user-defined task associated with the one of the objects of interest; and executing, by the signal handler of the computing device, the user-defined task.Type: GrantFiled: January 7, 2019Date of Patent: August 3, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Irwin D'Souza, Joran S. C. Siu, Filip Jeremic, Aleksandar Micic, Evgenia Badiyanova
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Publication number: 20210208927Abstract: A value profiling method, system and computer program product that leverages a guarded storage facility. During code execution, a first instruction is loaded. The first instruction has a first value designating a first region of memory and the first instruction is related to a first section of the code. A determination is made as to whether a guarded mode is enabled at the first region. Responsive to an enabled guarded mode at the first region, a secondary operation is triggered. The secondary operation is in addition to a primary operation of the first instruction. The primary operation is relative to the first region of the memory. The secondary operation causes a profiling of the first section of the code.Type: ApplicationFiled: January 3, 2020Publication date: July 8, 2021Applicant: International Business Machines CorporationInventors: Joran S.C. Siu, Irwin D'Souza, Filip Jeremic, Aleksandar Micic, Evgenia Badiyanova
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Patent number: 11042429Abstract: Systems and methods for selective stack trace generation during Java exception handling are disclosed. In embodiments, a method includes determining, by a Java virtual machine (JVM) of a computing device, that an exception object escapes a catch block of Java bytecodes; setting, by the JVM of the computing device, an escaped flag based on the determining that the exception object escapes the catch block; walking, by the JVM of the computing device, a call stack to locate an applicable catch block for the exception object, wherein the applicable catch block is the catch block; determining, by the JVM of the computing device, that the escaped flag is set in response to locating the applicable catch block; and creating, by the JVM of the computing device, a stack trace based on the determining that the escaped flag is set.Type: GrantFiled: January 7, 2019Date of Patent: June 22, 2021Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATIONInventors: Irwin D'Souza, Kevin J. Langman, Daniel Heidinga
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Patent number: 10891120Abstract: Embodiments described herein provide a solution for optimizing a compiling of program code. A proposed state pointer, which corresponds to a current state pointer to a current state node that represents a section of the program code, is added in an intermediate language (IL) representation of the program code. When the optimizing compiler determines that an optimization should be made to a section of code, the current state node is copied to create a proposed state node, which is then referenced by the proposed state pointer. The proposed state node is edited to include the optimization while the current state node remains unchanged. The success of the optimization is evaluated, and an updated IL representation is generated in which any references to nodes that are no longer included in the flow of the former IL representation are removed.Type: GrantFiled: February 14, 2019Date of Patent: January 12, 2021Assignee: International Business Machines CorporationInventor: Irwin D'Souza
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Patent number: 10877884Abstract: An approach for optimizing a copying of a data object in a concurrent copying garbage collection operation is provided. In an embodiment, a source copy of the data object to be copied as part of the garbage collection operation is identified. A copying of the source copy to a target location is initiated by a primary accessing thread. This initiating of the copying includes the creation of a temporary target object header for the target object in the target location that contains an indicator set to indicate that the copying is ongoing. As the copying is occurring, the execution of any other accessing threads that are attempting to use the data object are held for as long as the indicator indicates that the copying is ongoing. Once the copying has completed, the target object header is replaced with a copy of the source object header, resetting the indicator.Type: GrantFiled: January 9, 2018Date of Patent: December 29, 2020Assignee: International Business Machines CorporationInventors: Aleksandar Micic, Joran S. C. Siu, Irwin D'Souza, Filip Jeremic, Charles R. Gracie, Dmitri Pivkine
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Publication number: 20200218651Abstract: Systems and methods for object load introspection using guarded storage are disclosed. In embodiments, a computer-implemented method includes: determining objects of interest designated by a user; splitting a first subset of a predetermined memory heap into guarded regions based on a number of objects of interest; allocating each of the objects of interest to a respective one of the guarded regions and remaining objects to a second subset of the predetermined memory heap; executing a program; detecting one of the objects of interest is loaded from one of the guarded regions; generating a trap that transfers control of the executing the program to a signal handler, wherein the signal handler is designated to perform a user-defined task associated with the one of the objects of interest; and executing, by the signal handler of the computing device, the user-defined task.Type: ApplicationFiled: January 7, 2019Publication date: July 9, 2020Inventors: Irwin D'SOUZA, Joran S.C. SIU, Filip JEREMIC, Aleksandar MICIC, Evgenia BADIYANOVA
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Publication number: 20200218553Abstract: Systems and methods for selective stack trace generation during Java exception handling are disclosed. In embodiments, a method includes determining, by a Java virtual machine (JVM) of a computing device, that an exception object escapes a catch block of Java bytecodes; setting, by the JVM of the computing device, an escaped flag based on the determining that the exception object escapes the catch block; walking, by the JVM of the computing device, a call stack to locate an applicable catch block for the exception object, wherein the applicable catch block is the catch block; determining, by the JVM of the computing device, that the escaped flag is set in response to locating the applicable catch block; and creating, by the JVM of the computing device, a stack trace based on the determining that the escaped flag is set.Type: ApplicationFiled: January 7, 2019Publication date: July 9, 2020Inventors: Irwin D'SOUZA, Kevin J. LANGMAN, Daniel HEIDINGA
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Publication number: 20190213125Abstract: An approach for optimizing a copying of a data object in a concurrent copying garbage collection operation is provided. In an embodiment, a source copy of the data object to be copied as part of the garbage collection operation is identified. A copying of the source copy to a target location is initiated by a primary accessing thread. This initiating of the copying includes the creation of a temporary target object header for the target object in the target location that contains an indicator set to indicate that the copying is ongoing. As the copying is occurring, the execution of any other accessing threads that are attempting to use the data object are held for as long as the indicator indicates that the copying is ongoing. Once the copying has completed, the target object header is replaced with a copy of the source object header, resetting the indicator.Type: ApplicationFiled: January 9, 2018Publication date: July 11, 2019Inventors: Aleksandar Micic, Joran S.C. Siu, Irwin D'Souza, Filip Jeremic, Charles R. Gracie, Dmitri Pivkine
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Publication number: 20190179622Abstract: Embodiments described herein provide a solution for optimizing a compiling of program code. A proposed state pointer, which corresponds to a current state pointer to a current state node that represents a section of the program code, is added in an intermediate language (IL) representation of the program code. When the optimizing compiler determines that an optimization should be made to a section of code, the current state node is copied to create a proposed state node, which is then referenced by the proposed state pointer. The proposed state node is edited to include the optimization while the current state node remains unchanged. The success of the optimization is evaluated, and an updated IL representation is generated in which any references to nodes that are no longer included in the flow of the former IL representation are removed.Type: ApplicationFiled: February 14, 2019Publication date: June 13, 2019Inventor: Irwin D'Souza
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Patent number: 10289395Abstract: Embodiments described herein provide a solution for optimizing a compiling of program code. A proposed state pointer, which corresponds to a current state pointer to a current state node that represents a section of the program code, is added in an intermediate language (IL) representation of the program code. When the optimizing compiler determines that an optimization should be made to a section of code, the current state node is copied to create a proposed state node, which is then referenced by the proposed state pointer. The proposed state node is edited to include the optimization while the current state node remains unchanged. The success of the optimization is evaluated, and an updated IL representation is generated in which any references to nodes that are no longer included in the flow of the former IL representation are removed.Type: GrantFiled: October 17, 2017Date of Patent: May 14, 2019Assignee: International Business Machines CorporationInventor: Irwin D'Souza
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Publication number: 20190114159Abstract: Embodiments described herein provide a solution for optimizing a compiling of program code. A proposed state pointer, which corresponds to a current state pointer to a current state node that represents a section of the program code, is added in an intermediate language (IL) representation of the program code. When the optimizing compiler determines that an optimization should be made to a section of code, the current state node is copied to create a proposed state node, which is then referenced by the proposed state pointer. The proposed state node is edited to include the optimization while the current state node remains unchanged. The success of the optimization is evaluated, and an updated IL representation is generated in which any references to nodes that are no longer included in the flow of the former IL representation are removed.Type: ApplicationFiled: October 17, 2017Publication date: April 18, 2019Inventor: Irwin D'Souza