Abstract: One or more examples relate, generally, to providing timing signals to gate drivers of a converter. An example apparatus for providing timing signals to gate drivers of a converter includes a circuit that includes a timing input, and a plurality of outputs. The timing input may receive an incoming timing signal. The plurality of outputs may couple to a respective plurality of gate drivers to control an output voltage of a converter. The circuit may provide respective timing signals, at respective ones of the plurality of outputs at least partially responsive to the incoming timing signal, the respective timing signals synchronized such that like edges of the respective timing signals coincide.

Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.

Abstract: An impedance matching transmission circuit for a transducer has a transmission medium connected to the transducer. A transmitting circuit is connected to the transmission medium with the transmitting circuit terminating in a reference circuit element. The transmitting circuit comprises an analog to digital converter having an analog input connected to the reference circuit element, and having a digital output. A digital to analog converter receives the digital output and generates an analog output signal in response thereto. A driver circuit is connected to the transmission medium and receives the analog output signal and supplies a driver signal to the transmission medium.

Abstract: This document describes a new op-amp sharing technique for pipeline ADC without memory effect. The key features of this technique are: the usage of negative impedance converter and scaled replica of the op-amp input device to achieve zero error voltage, which in turns achieve low power dissipation due to the removal of the tradeoff between op-amp sharing and memory effect. With this technique much lower operation of pipeline ADC can be achieved for applications of data communications and image signal processing.

Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

Abstract: An impedance matching transmission circuit for a transducer has a transmission medium connected to the transducer. A transmitting circuit is connected to the transmission medium with the transmitting circuit terminating in a reference circuit element. The transmitting circuit comprises an analog to digital converter having an analog input connected to the reference circuit element, and having a digital output. A digital to analog converter receives the digital output and generates an analog output signal in response thereto. A driver circuit is connected to the transmission medium and receives the analog output signal and supplies a driver signal to the transmission medium.

Abstract: An impedance matching transmission circuit for a transducer has a transmission medium connected to the transducer. A transmitting circuit is connected to the transmission medium with the transmitting circuit terminating in a reference circuit element. The transmitting circuit comprises an analog to digital converter having an analog input connected to the reference circuit element, and having a digital output. A digital to analog converter receives the digital output and generates an analog output signal in response thereto. A driver circuit is connected to the transmission medium and receives the analog output signal and supplies a driver signal to the transmission medium.

Abstract: A multi-level transmitter circuit with substantially constant output impedance has a capacitive transducer connected between a voltage input and ground. A first voltage path connects the voltage input to a first positive voltage source. The first voltage path is controlled by a first control signal. A second voltage path connects the voltage input to a second positive voltage source, less than the first positive voltage source. The second voltage path passes through a diode and is controlled by a second control signal. A third voltage path connects the voltage input to a third voltage source, less than ground, and is controlled by the second control signal. The impedance at the voltage input during the first control signal is substantially the same as the impedance at the voltage input during the second control signal.

Abstract: A multi-level transmitter circuit with substantially constant output impedance has a capacitive transducer connected between a voltage input and ground. A first voltage path connects the voltage input to a first positive voltage source. The first voltage path is controlled by a first control signal. A second voltage path connects the voltage input to a second positive voltage source, less than the first positive voltage source. The second voltage path passes through a diode and is controlled by a second control signal. A third voltage path connects the voltage input to a third voltage source, less than ground, and is controlled by the second control signal. The impedance at the voltage input during the first control signal is substantially the same as the impedance at the voltage input during the second control signal.

Abstract: An impedance matching transmission circuit for a transducer has a transmission medium connected to the transducer. A transmitting circuit is connected to the transmission medium with the transmitting circuit terminating in a reference circuit element. The transmitting circuit comprises an analog to digital converter having an analog input connected to the reference circuit element, and having a digital output. A digital to analog converter receives the digital output and generates an analog output signal in response thereto. A driver circuit is connected to the transmission medium and receives the analog output signal and supplies a driver signal to the transmission medium.

Abstract: An adjustable shunt regulator circuit has two current paths in parallel, with each current path having a bipolar transistor therein with the bases of the bipolar transistors of the two current paths connected in common. One of the current paths has a high impedance node. A MOS transistor has a gate connected to the high impedance node, and a source and a drain. A resistor divide circuit is connected in parallel to the source and drain of the MOS transistor and provides the output of the regulator circuit. The resistor divide circuit has a first resistor connected in series with a second resistor at a first node. A feedback connects the first node to the bases of the bipolar transistors connected in common of the two current paths.

Abstract: A low power high side current monitor has an input terminal and a load terminal. A current sensing element is coupled to the input terminal and the load terminal. A first resistor is coupled to the input terminal. A first pair of transistors is coupled together and to the first resistor. A second pair of transistors is coupled together and to the first pair of transistors. A third pair of transistors is coupled together and to the second pair of transistors. At least one diode is coupled to the second pair of transistors and the third pair of transistors. A transistor has a first terminal coupled to the third pair of transistors and a second terminal coupled to the second pair of transistors. A second resistor is coupled to a third terminal of the transistor and to ground.