Patents by Inventor Isabelle Delbaere

Isabelle Delbaere has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Combination comprising a PPAR agonist such as elafibranor and an acetyl-CoA carboxylase (ACC) inhibitor
    Patent number: 11484517
    Abstract: The present invention relates to a combination product and its use in therapy.
    Type: Grant
    Filed: April 18, 2018
    Date of Patent: November 1, 2022
    Assignee: GENFIT
    Inventors: Robert Walczak, Carole Belanger, Vanessa Legry, Benoît Noel, Emeline Descamps, Guillaume Vidal, Mathilde Walczak, Isabelle Delbaere
  • COMBINATION COMPRISING A PPAR AGONIST SUCH AS ELAFIBRANOR AND AN ACETYL-COA CARBOXYLASE (ACC) INHIBITOR
    Publication number: 20200206169
    Abstract: The present invention relates to a combination product and its use in therapy.
    Type: Application
    Filed: April 18, 2018
    Publication date: July 2, 2020
    Inventors: ROBERT WALCZAK, CAROLE BELANGER, VANESSA LEGRY, BENOÎT NOEL, EMELINE DESCAMPS, GUILLAUME VIDAL, MATHILDE WALCZAK, ISABELLE DELBAERE
  • Integrated circuit clock distribution
    Patent number: 7474137
    Abstract: A circuit is provided with a plurality of interconnected logic blocks, a main clock generator for distributing a reference clock signal to the logic blocks. Each logic block in the circuit comprises a local clock generator that generates a set of synchronized local clock signals from the reference clock signal for further provision to respective elements of the logic block. In such a circuit, a phase shift is introduced between a set of local clock signals of a first block and a set of local clock signals of a second block.
    Type: Grant
    Filed: December 6, 2004
    Date of Patent: January 6, 2009
    Assignee: NXP B.V.
    Inventors: Sylvain Duvillard, Isabelle Delbaere
  • Integrated circuit clock distribution
    Publication number: 20070194829
    Abstract: A circuit is provided with a plurality of interconnected logic blocks, a main clock generator for distributing a reference clock signal to the logic blocks. Each logic block in the circuit comprises a local clock generator that generates a set of synchronized local clock signals from the reference clock signal for further provision to respective elements of the logic block. In such a circuit, a phase shift is introduced between a set of local clock signals of a first block and a set of local clock signals of a second block.
    Type: Application
    Filed: December 6, 2004
    Publication date: August 23, 2007
    Applicant: KONINKLIJKE PHILIPS ELECTRONIC, N.V.
    Inventors: Sylvain Duvillard, Isabelle Delbaere