Patents by Inventor Isamu Kirikihira

Isamu Kirikihira has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11006521
    Abstract: Provided are a wiring base plate and the like including an insulating substrate including a first surface portion including an aluminum oxide-based sintered body and a mullite-based sintered body; and a metallization layer including a second surface portion, the second surface portion containing at least one of a manganese compound and a molybdenum compound and being in contact with the first surface portion of the insulating substrate; wherein the second surface portion of the metallization layer and the first surface portion of the insulating substrate contain at least one of a manganese silicate phase and a magnesium silicate phase.
    Type: Grant
    Filed: January 24, 2018
    Date of Patent: May 11, 2021
    Assignee: KYOCERA Corporation
    Inventors: Isamu Kirikihira, Makoto Yamamoto
  • Publication number: 20200253045
    Abstract: Provided are a wiring base plate and the like including an insulating substrate including a first surface portion including an aluminum oxide-based sintered body and a mullite-based sintered body; and a metallization layer including a second surface portion, the second surface portion containing at least one of a manganese compound and a molybdenum compound and being in contact with the first surface portion of the insulating substrate; wherein the second surface portion of the metallization layer and the first surface portion of the insulating substrate contain at least one of a manganese silicate phase and a magnesium silicate phase.
    Type: Application
    Filed: January 24, 2018
    Publication date: August 6, 2020
    Applicant: KYOCERA Corporation
    Inventors: Isamu KIRIKIHIRA, Makoto YAMAMOTO
  • Patent number: 10462899
    Abstract: There is provided a ceramic substrate including: a silicon nitride crystal phase containing a plurality of silicon nitride crystals, and grain boundaries between the silicon nitride crystals; and a silicate phase containing magnesium silicate crystals and rare earth silicate crystals, respective maximum particle sizes of the magnesium silicate crystals and the rare earth silicate crystals being smaller than that of the silicon nitride crystals, the silicate phase being positioned in the grain boundaries.
    Type: Grant
    Filed: January 29, 2018
    Date of Patent: October 29, 2019
    Assignee: KYOCERA CORPORATION
    Inventor: Isamu Kirikihira
  • Publication number: 20180310402
    Abstract: There is provided a ceramic substrate including: a silicon nitride crystal phase containing a plurality of silicon nitride crystals, and grain boundaries between the silicon nitride crystals; and a silicate phase containing magnesium silicate crystals and rare earth silicate crystals, respective maximum particle sizes of the magnesium silicate crystals and the rare earth silicate crystals being smaller than that of the silicon nitride crystals, the silicate phase being positioned in the grain boundaries.
    Type: Application
    Filed: January 29, 2018
    Publication date: October 25, 2018
    Applicant: KYOCERA Corporation
    Inventor: Isamu KIRIKIHIRA
  • Patent number: 8446734
    Abstract: The invention relates to a circuit board having high density circuit and excellent connection reliability and lamination reliability. A resin fabric cloth (4) is provided by arranging single fibers (4a) or fiber bundles composed of a plurality of single fibers, which single fiber has a linear thermal expansion coefficient smaller than that of silicon, at least in two directions and alternately weaving them. In the board, the resin fabric cloth is covered with a resin portion (5) made of a resin material having a linear thermal expansion coefficient larger than that of silicon.
    Type: Grant
    Filed: March 30, 2007
    Date of Patent: May 21, 2013
    Assignee: Kyocera Corporation
    Inventors: Katsura Hayashi, Yutaka Tsukada, Kimihiro Yamanaka, Masaharu Shirai, Isamu Kirikihira
  • Publication number: 20100259910
    Abstract: The invention relates to a circuit board having high density circuit and excellent connection reliability and lamination reliability. A resin fabric cloth (4) is provided by arranging single fibers (4a) or fiber bundles composed of a plurality of single fibers, which single fiber has a linear thermal expansion coefficient smaller than that of silicon, at least in two directions and alternately weaving them. In the board, the resin fabric cloth is covered with a resin portion (5) made of a resin material having a linear thermal expansion coefficient larger than that of silicon.
    Type: Application
    Filed: March 30, 2007
    Publication date: October 14, 2010
    Applicant: KYOCERA CORPORATION
    Inventors: Katsura Hayashi, Yutaka Tsukada, Kimihiro Yamanaka, Masaharu Shirai, Isamu Kirikihira
  • Patent number: 5811495
    Abstract: Elastomeric block copolymers comprising polyether chains as soft segment in combination with aromatic polyamide chains as hard segment are disclosed, the soft and hard segments being introduced under a sequence control so as to develop excellent physical and mechanical properties. Processes for producing the elastomeric block copolymers are also disclosed.
    Type: Grant
    Filed: August 12, 1996
    Date of Patent: September 22, 1998
    Assignee: Tosoh Corporation
    Inventors: Isamu Kirikihira, Hiroshi Yamakawa, Yuji Kubo
  • Patent number: 5760143
    Abstract: An ester-amide block copolymer of the formula (1): ##STR1## wherein R is an aromatic hydrocarbon group with 6-20 carbon atoms and G is a residue of an aliphatic polyester, an aliphatic polycarbonate, an aliphatic polyethercarbonate or a polyorganosiloxane, and having a weight average molecular weight of 30,000-1,000,000. This copolymer is advantageously prepared by polycondensing an activated acyl lactam-terminated aromatic amide of the formula (2) with a diol of the formula (3) by bulk polymerization in a molten state: ##STR2## wherein R and G are the same as defined above.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: June 2, 1998
    Assignee: Tosoh Corporation
    Inventors: Yuji Kubo, Hiroshi Yamakawa, Isamu Kirikihira, Shinji Shimosato