Abstract: A DC restoration circuit includes a gate circuit, potential clamp capacitor, potential source circuit, detector circuit and mixing circuit. The gate circuit is responsive to both a first signal having a specific potential portion (pedestal level) and also to a gate signal generated at a given timing. The gate circuit detects the specific potential portion when the gate signal is generated, and provides a second signal corresponding to the detected specific potential portion. The potential clamp capacitor is used for clamping the potential of the second signal so as to provide a clamped potential. The potential source circuit is used for generating a level adjusting potential. The detector circuit is used for detecting the potential difference between the clamped potential and the level adjusting potential, and for providing a third signal corresponding to the potential difference.

Abstract: According to the present invention, an FM signal is applied to a limiter through a signal input terminal to remove a noise element included in the FM signal. The limited FM signal is then supplied to a delay means for delaying the signal for a predetermined time. The delayed signal is then supplied to one of a pair of input terminals of a multiplying circuit. Either the limited FM signal or a reference potential is supplied to the other input terminal of the multiplying circuit. The multiplying circuit demodulates the FM signal which is then supplied to a low pass filter. The low pass filter transforms the demodulated signal into an analog signal which is then supplied to a signal output terminal.

Abstract: A volume control circuit includes an input circuit, which may be a differential amplifier, for converting an input signal to 1st and 2nd currents. The 1st current contains a 1st signal component and the 2nd current contains a 2nd signal component whose phase is opposite to the phase of 1st signal component. The input circuit is coupled to 1st and 2nd divider circuits which may be a doubly balanced differential amplifier. A volume control signal is applied to the 1st and 2nd divider circuits. The 1st divider circuit divides or attenuates the 1st current according to the volume control signal and generates a 1st divided current. The 2nd divider circuit divides or attenuates the 2nd current according to the volume control signal and generates a 2nd divided current. The current division ratio of each of the 1st and 2nd divider circuits is changed with the magnitude of the volume control signal.

Abstract: A volume control circuit is provided which is not influenced by power supply fluctuations and which eliminates the audio signal component when the circuit is adjusted to minimum volume. An audio input signal is amplified by a differential amplifier and supplied to a substantially doubly balanced differential amplifier. Gain control of the audio signal is achieved by adjusting the bias voltage of the doubly balanced differential amplifier. The collector electrodes of two transistors used during minimum volume operation are connected directly to a power supply line. The controlled audio signal is supplied from the doubly balanced differential amplifier to a current mirror circuit which functions to cancel fluctuations in the power source. The connection of the collector electrodes of the two transistors in the doubly balanced differential amplifier to the power supply line functions to eliminate an audio component on the output when the volume control is set to minimum volume.