Abstract: A multimode input circuit comprises a input terminal, first outputting circuit including a buffer circuit, for receiving a first signal having a first amplitude variation via the input terminal and outputting the first signal of a preset potential; second outputting circuit for receiving a second signal having a second amplitude variation different from the first amplitude variation via the input terminal and outputting a third signal of a preset potential, the second outputting circuit including a power source supplying terminal for supplying the same potential as the maximum potential of the second signal, a first FET having a source connected to said power source supplying terminal, a gate supplied with a selection signal for specifying one of the input signals to be selected by the multimode input circuit and a drain, and a second FET formed to make a complementary structure together with the first FET and having a drain connected to the drain of the first FET, a gate connected to the input terminal and a

Abstract: A brush holder structure in an electric motor in which brush holders for housing brushes held in slidable contact with a commutator provided on a rotor shaft and an end bracket for rotatably supporting the rotor shaft are both integrally molded with a gear frame for housing and supporting a worm gear mechanism. In addition to the main mold for molding the gear frame, two first molds and two U-shaped second molds are abutted so as to form the brush holders when the gear frame is molded. A projection extending from each of the first molds extends between the arms of the associated U-shaped second molds to form a lead-out groove for leading out a pig tail extended from each brush.

Abstract: A brush holder structure in an electric motor in which brush holders for housing brushes held in slidable contact with a commutator provided on a rotor shaft and an end bracket for rotatably supporting the rotor shaft are both integrally molded with a gear frame for housing and supporting a worm gear mechanism. The worm gear mechanism includes a worm formed around the distal end portion of the rotor shaft and a worm wheel held in mesh with the worm. A lead-out groove for leading out a pig tail extended from each brush is formed in a proximal end side wall of each brush holder with respect to the rotor shaft, and a receiver for receiving resilient spring fitted in each brush holder to press each brush against a commutator is disposed between two proxiamal and distal end side walls of each brush holder. The receiver extends in the axial direction of the rotor shaft, and is set to have its width not exceeding the width of the lead-out groove in the circumferential direction of the rotor shaft.

Abstract: A P-well region is provided in a semiconductor substrate of N-type. A P-channel MOSFET is arranged in the N-type substrate while an N-channel MOSFET is arranged in the P-well region. The drain regions of the respective MOSFETs consist of high concentration impurity diffused regions and low concentration impurity diffused regions arranged about the respective high concentration impurity diffused regions. Also, a drain electrode is provided to cover the entire of the high and low concentration impurity diffused regions.

Abstract: A non-volatile semiconductor device includes word lines, and a non-volatile memory cell array having a plurality of non-volatile memory cells respectively connected to the word lines. The non-volatile semiconductor memory device further includes a level shifter for receiving, in a programmming mode, an address signal supplied from outside, and shifting the potential level of the address signal to a higher programming potential level, and a row decoder, provided between the word lines and the level shifter, for receiving and decoding the address signal which has been shifted by the level shifter, and selecting one of the word lines in accordance with the result of the decoding of the address signal, and setting the potential of the selected word line to the programming potential level.

Abstract: A power supply switching circuit includes first to third MOS transistors (P1, P2 and P3) connected in series between a high-potential source and a standard-potential source. The circuit performs a switching operation using a standard-potential and at least one potential which is different from the standard-poential, and outputs plural power supply potentials. The third MOS transistor (P3) is inserted between the first and second MOS transistors (P1 and P2). The back gate of the third transistor (P3) is connected to an output terminal (OUT1) formed between the second transistor (P2) and the third transistor (P3) and prevents the formation of a current path via turned-off transistor (P1) due to the action of a parasitic diode in the first and second transistors caused by potential fluctuations.

Abstract: A memory cell of a nonvolatile semiconductor memory device includes a P conductive type semiconductor substrate, first and second diffusion layers of an N conductivity type, formed in the substrate, a channel region formed in the surface region of the substrate, and which is located between the first and second diffusion layers, a floating gate electrode formed on the channel region, and a control gate electrode formed on the floating gate electrode. The memory cell further includes a third diffusion layer of the N conductivity type, and formed between the first layer and the channel region, the third layer having an impurity concentration lower than that of the first layer.

Abstract: A sense amplifier of the invention includes a PMOS transistor, the source and the drain of which are respectively connected to a power source and an EP-ROM as a signal source to be detected, and the gate and the drain of which are controlled to be at the same potential, a PMOS transistor connected to the power source and the EP-ROM in parallel with the PMOS transistor, and a ratio circuit in which the gate of one PMOS transistor and an NMOS transistor constituting a CMOS transistor is connected to the signal source. This arrangement of the invention enables a high speed operation.