Patents by Inventor Isao Chiku

Isao Chiku has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8780897
    Abstract: A cross-connect system includes a mapping unit that maps second signal frames on which cross-connection is performed with a space switch, into third signal frames on which cross-connection is performed with the space switch and a time switch; a selection unit that selects either first signal frames on which cross-connection is performed with the space switch and the time switch and corresponding clock signals, or the third signal frames and corresponding clock signals; a cross-connection unit that receives either the first signal frames and corresponding clock signals or the third signal frames and corresponding clock signals selected by the selection unit and performs cross-connection for either the first signal frames or the third signal frames; and a demapping unit that demaps the third signal frames output from the cross-connection unit into the second signal frames and output the second signal frames.
    Type: Grant
    Filed: February 27, 2012
    Date of Patent: July 15, 2014
    Assignee: Fujitsu Limited
    Inventors: Isao Chiku, Yukio Suda, Shiuji Sakakura
  • Publication number: 20120219291
    Abstract: A cross-connect system includes a mapping unit that maps second signal frames on which cross-connection is performed with a space switch, into third signal frames on which cross-connection is performed with the space switch and a time switch; a selection unit that selects either first signal frames on which cross-connection is performed with the space switch and the time switch and corresponding clock signals, or the third signal frames and corresponding clock signals; a cross-connection unit that receives either the first signal frames and corresponding clock signals or the third signal frames and corresponding clock signals selected by the selection unit and performs cross-connection for either the first signal frames or the third signal frames; and a demapping unit that demaps the third signal frames output from the cross-connection unit into the second signal frames and output the second signal frames.
    Type: Application
    Filed: February 27, 2012
    Publication date: August 30, 2012
    Applicant: FUJITSU LIMITED
    Inventors: Isao Chiku, Yukio Suda, Shiuji Sakakura
  • Publication number: 20090161698
    Abstract: A data processing apparatus, having an overhead branching unit configured to branch a signal data into an overhead and signal data; a control unit configured to retain the overhead; a time slot interchange unit configured to perform time slot interchange on the signal data; and an overhead insertion unit configured to insert the signal data and the overhead output from the time slot interchange unit and outputting as signal data.
    Type: Application
    Filed: December 18, 2008
    Publication date: June 25, 2009
    Applicant: FUJITSU LIMITED
    Inventor: Isao CHIKU
  • Patent number: 6226270
    Abstract: A method for a path trace check reducing a load on a computer, raising the speed of the check, and easily enabling an increase of nodes to be added. On a sender side, a first computer simply generates path trace data, adds a specific code CR to this, multiplexes this to the transmission data, then transmits the same to a transmission line. On a receiver side, a second computer simply generates an expected value of the path trace data, autonomously compares this expected value and the actual path trace data extracted from the received transmission data by using the specific code, and determines coincidence of the two.
    Type: Grant
    Filed: July 24, 1998
    Date of Patent: May 1, 2001
    Assignee: Fujitsu Limited
    Inventors: Isao Chiku, Toru Kosugi, Yoshihiro Yatagai, Yoshitaka Taki