Patents by Inventor Isao Kimura

Isao Kimura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250069805
    Abstract: A capacitor that includes: a metal base material; a dielectric layer on the metal base material; a conductive layer on the dielectric layer; an oxide layer between the metal base material and the dielectric layer; and an oxygen barrier layer between the oxide layer and the dielectric layer, wherein the oxide layer includes: a first oxidized region containing a metal of the metal base material; and a second oxidized region containing an atom of the oxygen barrier layer and a metal of the metal base material, and a thickness of the first oxidized region is 3 nm or less and is 0% to 50% of a thickness of the second oxidized region.
    Type: Application
    Filed: November 11, 2024
    Publication date: February 27, 2025
    Inventors: Naoki IWAJI, Yuuto YAMAMOTO, Isao KIMURA, Akio MASUNARI
  • Patent number: 10553777
    Abstract: A multi-layered film includes a first electroconductive layer, a dielectric layer, and a second electroconductive layer, which are sequentially layered and disposed on a main surface of a substrate. A lower surface of the dielectric layer comes into contact with an upper surface of the first electroconductive layer, an upper surface and an side surface of the dielectric layer is coated with the second electroconductive layer, and an side end of a portion at which the first electroconductive layer directly overlaps the second electroconductive layer is located inside a side end of the substrate on the main surface of the substrate.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: February 4, 2020
    Assignee: ULVAC, INC.
    Inventors: Hiroki Kobayashi, Mitsunori Henmi, Mitsutaka Hirose, Shinnosuke Mashima, Isao Kimura, Koukou Suu
  • Patent number: 10006202
    Abstract: The buckling-restrained brace that is capable of being fixed to connected portions of a structure using bolts, the brace includes: a plate member extending in an axial direction, and in which bolt holes for fixing the bolts are formed at end portions of the plate member in the axial direction; and a buckling-restrained member configured to restrain a center portion of the plate member in the axial direction to prevent the plate member from buckling, wherein the buckling-restrained member includes a pipe member surrounding the plate member from the outside in a radial direction, and a filler filling the gap between the pipe member and the plate member, and the plate member includes a fixing plate, a portion of which is embedded in the filler, and the remaining portion is protruded from the filler in the axial direction, and in which the bolt hole is formed at an end portion of the remaining portion in the axial direction.
    Type: Grant
    Filed: August 31, 2015
    Date of Patent: June 26, 2018
    Assignee: NIPPON STEEL & SUMIKIN ENGINEERING CO., LTD.
    Inventors: Isao Kimura, Norihisa Kawamura, Toyoki Kuroiwa
  • Patent number: 9985196
    Abstract: A multi-layered film includes an electroconductive layer made of platinum (Pt), a seed layer including lanthanum (La), nickel (Ni), and oxygen (O), and a dielectric layer being preferentially oriented in a c-axis direction, which are at least sequentially disposed on a main surface of a substrate made of silicon.
    Type: Grant
    Filed: June 11, 2015
    Date of Patent: May 29, 2018
    Assignee: ULVAC, INC.
    Inventors: Hiroki Kobayashi, Mitsunori Henmi, Mitsutaka Hirose, Kazuya Tsukagoshi, Isao Kimura, Koukou Suu
  • Patent number: 9935897
    Abstract: Network switching arrangements including: setting an operation mode of a target switching block to a operation mode that is different from an operation mode of a first switching block while the first switching block is handling a switching process, the target switching block being one switching block selected from second switching blocks; performing a switchover process including starting the switching process using the target switching block instead of the first switching block, after completion of setting the operation mode of the target switching block; and copying the switching information held by the first switching block to the target switching block, prior to starting the switching process using the target switching block, after completion of setting the operation mode of the target switching block.
    Type: Grant
    Filed: December 19, 2016
    Date of Patent: April 3, 2018
    Assignee: ALAXALA NETWORKS CORPORATION
    Inventors: Masayuki Shinohara, Nobuhito Matsuyama, Takayuki Muranaka, Isao Kimura, Shinichi Akahane
  • Patent number: 9846027
    Abstract: A measuring apparatus, method and program with which a distance between two points that are not within one photographing range can be easily measured is provided. According to an embodiment, a representative point is set in an image in which a start point is set, and the coordinates, of the points and characteristic quantity of a neighborhood image is stored. Hereafter in each image until an end point is set, a representative point of the most recent image is searched, the coordinates thereof are stored, a new representative point is set, the coordinates thereof and the characteristic quantity of the neighborhood image are stored, and the coordinates of the end point are stored. A vector between the respective two points connecting the start point, representative points and the end point in the sequence of setting is calculated, and the distance between the start point and the end point is calculated.
    Type: Grant
    Filed: July 8, 2010
    Date of Patent: December 19, 2017
    Assignee: NIKON CORPORATION
    Inventors: Isao Kimura, Atsushi Takeuchi
  • Publication number: 20170234012
    Abstract: The buckling-restrained brace that is capable of being fixed to connected portions of a structure using bolts, the brace includes: a plate member extending in an axial direction, and in which bolt holes for fixing the bolts are formed at end portions of the plate member in the axial direction; and a buckling-restrained member configured to restrain a center portion of the plate member in the axial direction to prevent the plate member from buckling, wherein the buckling-restrained member includes a pipe member surrounding the plate member from the outside in a radial direction, and a filler filling the gap between the pipe member and the plate member, and the plate member includes a fixing plate, a portion of which is embedded in the filler, and the remaining portion is protruded from the filler in the axial direction, and in which the bolt hole is formed at an end portion of the remaining portion in the axial direction.
    Type: Application
    Filed: August 31, 2015
    Publication date: August 17, 2017
    Applicant: NIPPON STEEL & SUMIKIN ENGINEERING CO., LTD.
    Inventors: Isao KIMURA, Norihisa KAWAMURA, Toyoki KUROIWA
  • Publication number: 20170148975
    Abstract: A multi-layered film includes an electroconductive layer made of platinum (Pt), a seed layer including lanthanum (La), nickel (Ni), and oxygen (O), and a dielectric layer being preferentially oriented in a c-axis direction, which are at least sequentially disposed on a main surface of a substrate made of silicon.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 25, 2017
    Inventors: Hiroki KOBAYASHI, Mitsunori HENMI, Mitsutaka HIROSE, Kazuya TSUKAGOSHI, Isao KIMURA, Koukou SUU
  • Publication number: 20170141289
    Abstract: A multi-layered film includes a first electroconductive layer, a dielectric layer, and a second electroconductive layer, which are sequentially layered and disposed on a main surface of a substrate. A lower surface of the dielectric layer comes into contact with an upper surface of the first electroconductive layer, an upper surface and an side surface of the dielectric layer is coated with the second electroconductive layer, and an side end of a portion at which the first electroconductive layer directly overlaps the second electroconductive layer is located inside a side end of the substrate on the main surface of the substrate.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 18, 2017
    Inventors: Hiroki KOBAYASHI, Mitsunori HENMI, Mitsutaka HIROSE, Shinnosuke MASHIMA, Isao KIMURA, Koukou SUU
  • Publication number: 20170133581
    Abstract: A method of manufacturing a multi-layered film at least includes: a step A of forming an electroconductive layer on a substrate; a step B of forming a seed layer so as to coat the electroconductive layer; and a step C of forming a dielectric layer so as to coat the seed layer. In the step B, a compound including strontium (Sr), ruthenium (Ru), and oxygen (O) is formed as the seed layer by a sputtering method. In the step C, where a substrate temperature is defined by Td when the dielectric layer is formed, 560° C.?Td?720° C. is determined.
    Type: Application
    Filed: June 11, 2015
    Publication date: May 11, 2017
    Inventors: Hiroki KOBAYASHI, Mitsunori HENMI, Mitsutaka HIROSE, Kazuya TSUKAGOSHI, Isao KIMURA, Koukou SUU
  • Publication number: 20170104693
    Abstract: Network switching arrangements including: setting an operation mode of a target switching block to a operation mode that is different from an operation mode of a first switching block while the first switching block is handling a switching process, the target switching block being one switching block selected from second switching blocks; performing a switchover process including starting the switching process using the target switching block instead of the first switching block, after completion of setting the operation mode of the target switching block; and copying the switching information held by the first switching block to the target switching block, prior to starting the switching process using the target switching block, after completion of setting the operation mode of the target switching block.
    Type: Application
    Filed: December 19, 2016
    Publication date: April 13, 2017
    Applicant: ALAXALA NETWORKS CORPORATION
    Inventors: Masayuki Shinohara, Nobuhito Matsuyama, Takayuki Muranaka, Isao Kimura, Shinichi Akahane
  • Patent number: 9593409
    Abstract: A dielectric film forming apparatus and a method for forming a dielectric film so as to form a dielectric film with a (100)/(001) orientation. A dielectric film forming apparatus includes a deposition preventive plate heating portion that heats a deposition preventive plate disposed in a position where particles discharged from a target adhere. Sputtering gas is introduced from a sputtering gas introduction unit into a vacuum chamber. The deposition preventive plate is heated to a temperature higher than a film forming temperature so as to emit vapor from a thin film adhered to the deposition preventive plate. After a seed layer is formed on a substrate, the substrate is heated to the film forming temperature, and AC voltage is applied to the target from a power supply and then, the target is sputtered so as to form a dielectric film on the substrate.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: March 14, 2017
    Assignee: ULVAC, INC.
    Inventors: Isao Kimura, Takehito Jinbo, Hiroki Kobayashi, Youhei Endou, Youhei Oonishi
  • Patent number: 9559986
    Abstract: Network switching arrangements including: setting an operation mode of a target switching block to a operation mode that is different from an operation mode of a first switching block while the first switching block is handling a switching process, the target switching block being one switching block selected from second switching blocks; performing a switchover process including starting the switching process using the target switching block instead of the first switching block, after completion of setting the operation mode of the target switching block; and copying the switching information held by the first switching block to the target switching block, prior to starting the switching process using the target switching block, after completion of setting the operation mode of the target switching block.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: January 31, 2017
    Assignee: ALAXALA NETWORKS CORPORATION
    Inventors: Masayuki Shinohara, Nobuhito Matsuyama, Takayuki Muranaka, Isao Kimura, Shinichi Akahane
  • Publication number: 20170018702
    Abstract: A method of manufacturing a multi-layered film includes: forming an electroconductive layer on a substrate; forming a seed layer including an oxidative product having a perovskite structure so as to coat the electroconductive layer by a sputtering method; and forming a dielectric layer so as to coat the seed layer.
    Type: Application
    Filed: March 3, 2015
    Publication date: January 19, 2017
    Applicant: ULVAC, Inc.
    Inventors: Hiroki KOBAYASHI, Mitsunori HENMI, Mitsutaka HIROSE, Kazuya TSUKAGOSHI, Isao KIMURA, Koukou SUU
  • Patent number: 9435301
    Abstract: Provided is a tubular molded foam with a plate portion capable of reliably preventing the occurrence of an unwanted lump on the inside of a tube body even when the molding is manufactured using a molten resin having a high expansion ratio. The tubular molded foam includes a tube body and a plate portion joined with an outside of the tube body. The plate portion has a recess in the vicinity of a joint surface with the tube body.
    Type: Grant
    Filed: July 26, 2012
    Date of Patent: September 6, 2016
    Assignee: KYORAKU CO., LTD.
    Inventors: Naoto Tani, Masayuki Mishima, Isao Kimura
  • Patent number: 9347128
    Abstract: A method for forming a dielectric thin film that forms a PZT thin film having a (100)/(001) orientation. After a seed layer is formed by adhering PbO gas to a surface of a substrate, a voltage is applied to a target of lead zirconate titanate (PZT) and perform sputtering, while the substrate is heated inside of an evacuated vacuum chamber. Then, a PZT thin film is formed on the surface of the substrate. Because Pb and O are supplied from the seed layer, a PZT film having a (001)/(100) orientation can be formed without lack of Pb.
    Type: Grant
    Filed: April 5, 2013
    Date of Patent: May 24, 2016
    Assignee: ULVAC, INC.
    Inventors: Isao Kimura, Takehito Jinbo, Hiroki Kobayashi, Youhei Endou, Youhei Oonishi
  • Patent number: 8795403
    Abstract: The present invention provides a filter cloth for a dust collector which shows low pressure loss, no clogging, superior dust shaking-off performance, and durability for continuous use without impairing collection performance, even under such dust collection conditions as high speed filtration and high dust concentration. The filter cloth for a dust collector relevant to the present invention is a filter cloth which is made by laminating and integrating a filtration layer of a nonwoven fabric layer consisting of a thermoplastic fiber and a support layer consisting of a woven fabric layer, characterized in that at least filtration surface layer of said laminated and integrated filter cloth has a concave-convex shape having a height from hill part to trough part of 1.6 to 20.0 mm.
    Type: Grant
    Filed: August 9, 2010
    Date of Patent: August 5, 2014
    Assignees: Asahi Kasei Fibers Corporation, Asamasu Co., Ltd.
    Inventors: Yukimasa Kuroda, Yutaka Sasaki, Yoshihiro Takagi, Isao Kimura
  • Publication number: 20140003280
    Abstract: Network switching arrangements including: setting an operation mode of a target switching block to a operation mode that is different from an operation mode of a first switching block while the first switching block is handling a switching process, the target switching block being one switching block selected from second switching blocks; performing a switchover process including starting the switching process using the target switching block instead of the first switching block, after completion of setting the operation mode of the target switching block; and copying the switching information held by the first switching block to the target switching block, prior to starting the switching process using the target switching block, after completion of setting the operation mode of the target switching block.
    Type: Application
    Filed: June 24, 2013
    Publication date: January 2, 2014
    Applicant: ALAXALA Networks Corporation
    Inventors: Masayuki SHINOHARA, Nobuhito MATSUYAMA, Takayuki MURANAKA, Isao KIMURA, Shinichi AKAHANE
  • Publication number: 20130228453
    Abstract: A dielectric film forming apparatus and a method for forming a dielectric film so as to form a dielectric film with a (100)/(001) orientation. A dielectric film forming apparatus includes a deposition preventive plate heating portion that heats a deposition preventive plate disposed in a position where particles discharged from a target adhere. Sputtering gas is introduced from a sputtering gas introduction unit into a vacuum chamber. The deposition preventive plate is heated to a temperature higher than a film forming temperature so as to emit vapor from a thin film adhered to the deposition preventive plate. After a seed layer is formed on a substrate, the substrate is heated to the film forming temperature, and AC voltage is applied to the target from a power supply and then, the target is sputtered so as to form a dielectric film on the substrate.
    Type: Application
    Filed: April 5, 2013
    Publication date: September 5, 2013
    Applicant: ULVAC, Inc.
    Inventors: Isao KIMURA, Takehito JINBO, Hiroki KOBAYASHI, Youhei ENDOU, Youhei OONISHI
  • Patent number: 8527834
    Abstract: An information processing device implements error control including at least one of error detection and error correction. The device comprises an information bit sequence acquiring unit and an encoder. The information bit sequence acquiring unit acquires an information bit sequence. The encoder generates a redundant bit sequence enabling execution of error control of the entire information bit sequence, the redundant bit sequence being generated through encoding by a predetermined code based on the information bit sequence and generates a codeword that includes the information bit sequence and the redundant bit sequence. The encoder generates the redundant bit sequence in such a way that one or more bits contained in the redundant bit sequence each functions as a parity bit for one of a plurality of divided information bit sequences produced by dividing the information bit sequence.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: September 3, 2013
    Assignee: Alaxala Networks Corporation
    Inventors: Yoshihiro Nakao, Isao Kimura