Patents by Inventor Isao Makabe

Isao Makabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10622470
    Abstract: A process of forming a semiconductor device primarily made of nitride semiconductor materials is disclosed. The process includes steps of: (a) growing a semiconductor stack including a channel layer and a barrier layer sequentially on a substrate, where the channel layer is made of gallium nitride (GaN); (b) patterning a mask on the barrier layer; (c) etching a portion of the barrier layer and a portion of the channel layer with the mask to form a recess in the semiconductor stack; and (d) growing a contact layer selectively within the recess with nitrogen (N2) used as a carrier gas at a maximum temperature of 1000° C.
    Type: Grant
    Filed: August 6, 2018
    Date of Patent: April 14, 2020
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Isao Makabe
  • Patent number: 10505013
    Abstract: A process of forming a high electron mobility transistor (HEMT) with a reverse arrangement for the barrier layer and the channel layer thereof is disclosed. The process includes steps of epitaxially growing an oxide layer containing zinc (Zn) on a substrate where the oxide layer shows an O-polar surface; epitaxially growing a semiconductor stack made of nitride semiconductor materials on the oxide layer where the semiconductor stack includes a nitride semiconductor layer, a barrier layer and a channel layer on the oxide layer in this order; attaching a temporal substrate to the semiconductor stack; removing the substrate and the oxide layer from the semiconductor stack; attaching a support substrate to the nitride semiconductor layer; and removing the temporal substrate from the semiconductor stack.
    Type: Grant
    Filed: July 20, 2018
    Date of Patent: December 10, 2019
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Isao Makabe
  • Publication number: 20190043978
    Abstract: A process of forming a semiconductor device primarily made of nitride semiconductor materials is disclosed. The process comprises steps of: (a) growing a semiconductor stack including a channel layer and a barrier layer sequentially on a substrate, where the channel layer being made of gallium nitride (GaN) on a substrate; (b) patterning a mask on the barrier layer; (c) etching a portion of the barrier layer and a portion of the channel layer using the mask to form a recess in the semiconductor stack; and (d) growing a contact layer selectively within the recess using nitrogen (N2) as a carrier gas at a temperature of 1000° C. at highest.
    Type: Application
    Filed: August 6, 2018
    Publication date: February 7, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Isao MAKABE
  • Publication number: 20190027577
    Abstract: A process of forming a high electro mobility transistor (HEMT) with a reveres arrangement for the barrier layer and the channel layer thereof is disclosed. The process includes steps of epitaxially growing an oxide layer containing zinc (Zn) on a substrate where the oxide layer showing an O-polar surface; epitaxially growing a semiconductor stack made of nitride semiconductor materials on the oxide layer where the semiconductor stack includes a nitride semiconductor layer, a barrier layer and a channel layer on the oxide layer in this order; attaching a temporal substrate to the semiconductor stack; removing the substrate and the oxide layer from the semiconductor stack; attaching a support substrate to the nitride semiconductor layer; and removing the temporal substrate from the semiconductor stack.
    Type: Application
    Filed: July 20, 2018
    Publication date: January 24, 2019
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Isao Makabe
  • Patent number: 10038086
    Abstract: A process of forming a High Electron Mobility Transistor (HEMT) made of nitride semiconductor materials is disclosed. The process sequentially grows a buffer layer, a n-type layer doped with n-type dopants, and a channel layer by a metal organic chemical vapor deposition (MOCVD) technique. A feature of the process is to supply only an n-type dopant gas before the growth of the n-type layer but after the growth of the buffer layer.
    Type: Grant
    Filed: March 15, 2017
    Date of Patent: July 31, 2018
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ken Nakata, Tsuyoshi Kouchi, Isao Makabe, Keiichi Yui
  • Publication number: 20180158926
    Abstract: A process of forming a nitride semiconductor is disclosed. The process includes steps of (a) growing an aluminum gallium nitride (GaN) as a channel layer, and (b) growing an indium aluminum gallium nitride (InAlGaN) as a barrier layer. The InAlGaN layer is grown at a temperature lower than a growth temperature for the GaN, and has an indium (In) composition less than 14% but preferably greater than 10%. The InAlGaN is substantially lattice-matched with the GaN.
    Type: Application
    Filed: December 4, 2017
    Publication date: June 7, 2018
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Ken Nakata, Isao Makabe
  • Publication number: 20180053648
    Abstract: A method of manufacturing a semiconductor device according to an embodiment of the present invention includes steps of forming an AlN layer on a SiC substrate under conditions of a growth temperature of 1100° C. or lower, growth pressure of 100 torr or less and a V/III ratio of source gasses of 500 or less, forming a channel layer made of a nitride semiconductor, forming an electron supply layer, and forming gate, source, and drain electrodes.
    Type: Application
    Filed: October 13, 2017
    Publication date: February 22, 2018
    Inventors: Ken Nakata, Keiichi Yui, Hiroyuki Ichikawa, Isao Makabe, Tsuyoshi Kouchi
  • Patent number: 9355843
    Abstract: A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN, a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer, and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
    Type: Grant
    Filed: July 27, 2015
    Date of Patent: May 31, 2016
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichi Yui, Ken Nakata, Tsuyoshi Kouchi, Isao Makabe
  • Publication number: 20160149024
    Abstract: An electron device formed by primarily nitrides semiconductor materials and a method to form the electron device are disclosed. The electron device includes, on the SiC substrate, a buffer layer of AlN, a channel layer of GaN, and an electron supplying layer of AlGaN. The AlGaN layer has the oxygen concentration higher than the carbon concentration in the whole thereof. The AlGaN layer is grown on the channel layer under conditions of: a ratio of the flow rate of the ammonia gas against the flow rate of the gases for Al and Ga is 5000 to 20000; and/or the growth, rate of the AlGaN layer is slower than 0.2 nm/sec.
    Type: Application
    Filed: November 19, 2015
    Publication date: May 26, 2016
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Isao MAKABE
  • Publication number: 20160111274
    Abstract: A method for producing a nitride semiconductor device is disclosed. The method includes steps of: forming a channel layer, an InAlN doped layer sequentially on the substrate, raising a temperature of the substrate as supplying a gas source containing In, and/or another gas source containing Al, and growing GaN layer on the InAlN doped. Or, the method grows the channel layer, the InAlN layer, and another GaN layer sequentially on the substrate, raising the temperature of the substrate, and growing the GaN layer. These methods suppress the sublimation of InN from the InAlN layer.
    Type: Application
    Filed: December 30, 2015
    Publication date: April 21, 2016
    Inventors: Keiichi Yui, Ken Nakata, Isao Makabe, Tsuyoshi Kouchi
  • Publication number: 20150332915
    Abstract: A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN, a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer, and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
    Type: Application
    Filed: July 27, 2015
    Publication date: November 19, 2015
    Inventors: Keiichi Yui, Ken Nakata, Tsuyoshi Kouchi, Isao Makabe
  • Publication number: 20150279942
    Abstract: A process to obtain a nitride transistor containing a gallium nitride (GaN) is disclosed. The process first grows an AlN layer on a substrate, then crown the GaN layer cc the AlN layer. Between the growth of the AlN layer and the GaN layer, the process leaves the AlN layer grown art the substrate in a temperature higher than the growth temperature of the AlN layer for a preset period. This heat treatment of the AlN layer sublimates impurities accumulated on the surface of the AlN layer and enhances the crystal quality of the GaN layer grown thereon.
    Type: Application
    Filed: March 17, 2015
    Publication date: October 1, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichi YUI, Ken Nakata, Isao Makabe, Tsuyoshi Kouchi
  • Publication number: 20150279658
    Abstract: A method to produce a nitride semiconductor device is disclosed, The method includes a step to grow sequentially, on a substrate, an AlN layer, a AlGaN layer with the Al composition not less than 2.5% but not greater than 9%, a GaN layer with a thickness not less than 250 nm but not greater than 1400 nm. A feature of the process is that, after the growth of the AlGaN layer but before the growth of the GaN layer, at least the source gases for the group III elements are interrupted to be supplied for a period of not less than 80 seconds but not longer than 220 seconds.
    Type: Application
    Filed: March 24, 2015
    Publication date: October 1, 2015
    Applicant: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventors: Keiichi YUI, Ken Nakata, Isao Makabe, Tsuyoshi KOUCHI
  • Patent number: 9123534
    Abstract: A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN, a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer, and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
    Type: Grant
    Filed: June 5, 2014
    Date of Patent: September 1, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichi Yui, Ken Nakata, Tsuyoshi Kouchi, Isao Makabe
  • Patent number: 9029873
    Abstract: The semiconductor device includes a SiC substrate; an aluminum nitride layer provided on the substrate and having an island-shaped pattern consisting of plural islands: a channel layer provided on the AlN layer and comprising a nitride semiconductor; an electron supplying layer provided on the channel layer and having a band gap larger than that of the channel layer; and a gate, source and drain electrodes on the electron supply layer. The AlN layer has an area-averaged circularity Y/X of greater than 0.2. Y is a sum of values obtained by multiplying circularities of the plural islands by areas of the plural islands respectively, X is a sum of the areas of the plural islands. The circularity are calculated by a formula of (4?×area)/(length of periphery)2 where the area and the length of periphery are an area and a length of periphery of each island.
    Type: Grant
    Filed: March 5, 2014
    Date of Patent: May 12, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Ken Nakata, Keiichi Yui, Tsuyoshi Kouchi, Isao Makabe, Hiroyuki Ichikawa
  • Patent number: 8993416
    Abstract: A method of manufacturing a semiconductor device includes growing a first GaN layer on a SiC substrate, and forming a second GaN layer on the first GaN layer, the second GaN layer being grown under such conditions that a ratio of a vertical growth rate to a horizontal growth rate is lower than that in the growth of the first GaN layer.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: March 31, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichi Yui, Ken Nakata, Isao Makabe, Hiroyuki Ichikawa
  • Patent number: 8987015
    Abstract: A method for fabricating a semiconductor device includes performing thermal cleaning for a surface of a silicon substrate in an atmosphere including hydrogen under a condition that a thermal cleaning temperature is higher than or equal to 700° C. and is lower than or equal to 1060° C., and a thermal cleaning time is longer than or equal to 5 minutes and is shorter than or equal to 15 minutes; forming a first AlN layer on the substrate with a first V/III source ratio, the forming of the first AlN layer including supplying an Al source to the surface of the substrate without supplying a N source, and supplying both the Al source and the N source; forming a second AlN layer on the first AlN layer with a second V/III source ratio that is greater than the first ratio; and forming a GaN-based semiconductor layer on the second AlN layer.
    Type: Grant
    Filed: June 29, 2011
    Date of Patent: March 24, 2015
    Assignee: Sumitomo Electric Industries, Ltd.
    Inventors: Keiichi Yui, Akira Furuya, Ken Nakata, Takamitsu Kitamura, Isao Makabe
  • Publication number: 20140361308
    Abstract: A method of manufacturing a semiconductor device according to one aspect of the present invention includes a step of forming a first layer of InAlN, a step of forming a second layer of InAlGaN on the first layer under a growth temperature higher than that of the first layer, and a step of forming a third layer of GaN, AlGaN or InGaN under a growth temperature higher than that of the first layer.
    Type: Application
    Filed: June 5, 2014
    Publication date: December 11, 2014
    Inventors: Keiichi Yui, Ken Nakata, Tsuyoshi Kouchi, Isao Makabe
  • Publication number: 20140346530
    Abstract: A semiconductor device according to an embodiment of the present invention includes a SiC substrate, an AlN layer provided on the SiC substrate and having a maximum valley depth Rv of 5 nm or less in an upper surface, a channel layer provided on the AlN layer and composed of a nitride semiconductor, an electron supply layer provided on the channel layer and having a greater band gap than the channel layer, and a gate electrode, a source electrode and a drain electrode provided on the electron supply layer.
    Type: Application
    Filed: May 22, 2014
    Publication date: November 27, 2014
    Applicant: SUMITOMO ELECTRIC INDUSTIRES, LTD.
    Inventors: Ken NAKATA, Keiichi YUI, Hiroyuki ICHIKAWA, Isao MAKABE, Tsuyoshi KOUCHI
  • Publication number: 20140252377
    Abstract: The semiconductor device includes a SiC substrate; an aluminum nitride layer provided on the substrate and having an island-shaped pattern consisting of plural islands: a channel layer provided on the AlN layer and comprising a nitride semiconductor; an electron supplying layer provided on the channel layer and having a band gap larger than that of the channel layer; and a gate, source and drain electrodes on the electron supply layer. The AlN layer has an area-averaged circularity Y/X of greater than 0.2. Y is a sum of values obtained by multiplying circularities of the plural islands by areas of the plural islands respectively, X is a sum of the areas of the plural islands. The circularity are calculated by a formula of (4?×area)/(length of periphery)2 where the area and the length of periphery are an area and a length of periphery of each island.
    Type: Application
    Filed: March 5, 2014
    Publication date: September 11, 2014
    Applicant: Sumitomo Electric Industries, Ltd.
    Inventors: Ken NAKATA, Keiichi YUI, Tsuyoshi KOUCHI, Isao MAKABE, Hiroyuki ICHIKAWA