Patents by Inventor Isao Nagase

Isao Nagase has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7571264
    Abstract: Provided is a computer system which includes computers and a storage system coupled to the computers. The storage system includes a first load measuring module that measures a first access load for each channel adaptor. At least one of the computers includes a path management module that manages paths through which the computers access logical units. The path management module includes a second load measuring module that measures a second access load imposed by access from the computer to the logical unit, and an active path setting module that selects one of the channel adaptors based on the first access and the second access load measured by the first and second load measuring modules, and setting an active path passing through the channel adaptor. Thus, a load on an entire system is balanced, thereby improving performance while a cache hit rate of a storage system is maintained.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: August 4, 2009
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Hirofumi Sahara, Hiroshi Morishima, Makoto Aoki, Osamu Kohama, Satoshi Kadoiri, Isao Nagase
  • Publication number: 20060230189
    Abstract: Provided is a computer system which includes computers and a storage system coupled to the computers. The storage system includes a first load measuring module that measures a first access load for each channel adaptor. At least one of the computers includes a path management module that manages paths through which the computers access logical units. The path management module includes a second load measuring module that measures a second access load imposed by access from the computer to the logical unit, and an active path setting module that selects one of the channel adaptors based on the first access and the second access load measured by the first and second load measuring modules, and setting an active path passing through the channel adaptor. Thus, a load on an entire system is balanced, thereby improving performance while a cache hit rate of a storage system is maintained.
    Type: Application
    Filed: July 26, 2005
    Publication date: October 12, 2006
    Inventors: Hirofumi Sahara, Hiroshi Morishima, Makoto Aoki, Osamu Kohama, Satoshi Kadoiri, Isao Nagase
  • Patent number: 7120912
    Abstract: Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.
    Type: Grant
    Filed: October 29, 2004
    Date of Patent: October 10, 2006
    Assignees: Hitachi, Ltd., Hitachi Software Engineering Co., Ltd.
    Inventors: Satoshi Kadoiri, Hiroshi Morishima, Makoto Aoki, Isao Nagase, Osamu Kohama, Hirofumi Sahara
  • Publication number: 20060026346
    Abstract: Provided is a high performance storage system, in which a cache memory is effectively used and access loads are balanced. In a computer system including a computer and a storage system coupled with the computer, the storage system includes one or more channel adapters which communicate with the computer, and a plurality of logical units which store data. The computer includes one or more host bus adapters which communicate with the storage system, and a path management module which manages a path along which the computer accesses the logical unit. The path management module includes a load measurement module which measures an access load on each logical unit, and an active path setting module which sets one or more active paths, along which an access from the computer passes, for each of the logical unit based on the measured access load.
    Type: Application
    Filed: October 29, 2004
    Publication date: February 2, 2006
    Inventors: Satoshi Kadoiri, Hiroshi Morishima, Makoto Aoki, Isao Nagase