Abstract: A solid-state imaging device includes: an output buffer part adapted to convert charge at an output node into a voltage signal corresponding to the amount of the charge, and output an active comparison result signal when the voltage signal and a first reference signal are the same level; an output buffer part adapted to convert the charge at the output node into a voltage signal corresponding to the amount of the charge, compare the voltage signal with the first reference signal, and output the active comparison result signal when the voltage signal and the first reference signal are the same level; the holding signal readout part disposed between the input node of the signal holding part and the feeding line of the second reference signal, conduction or non-conduction of the holding signal readout part being controlled depending on the comparison result signal outputted by the output buffer part.

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus that are capable of achieving reduced noise at a voltage sample-and-hold node without requiring an increase in capacitance of a signal holding capacitor for sampling and holding voltage. A solid-state imaging device includes: a photoelectric conversion reading part; an amplifier circuit; a signal holding part including a sample-and-hold signal holding capacitor for holding the read-out voltage signal amplified by the amplifier circuit and outputting the held voltage signal; a first in-pixel signal line to which a low-gain read-out voltage signal is output; and a second in-pixel signal line connected to the output side of the amplifier circuit and to which a high-gain read-out voltage signal is output. A second differential transistor of a differential transistor pair of the amplifier circuit also serves as a source follower transistor.

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus that are capable of selecting a pixel operating mode between a RS mode and a GS mode and switching a conversion gain read-out mode, where signals produced with different conversion gains are read, among several options depending on a scene. As a result, the solid-state imaging device, the method for driving the solid-state imaging device and the electronic apparatus can minimize a drop in SNR at the conjunction point between a HCG signal and a LCG signal and also achieve high full well capacity and little dark noise. In a solid-state imaging device, a pixel part includes pixels arranged in a matrix pattern, and each pixel includes a photoelectric conversion reading part. The solid-state imaging device is capable of performing rolling shutter (RS) and global shutter (GS).

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions. A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.

Abstract: A solid-state imaging device, a method for driving a solid-state imaging device and an electronic apparatus are capable of reducing kTC noise of a LCG signal, preventing a drop in SNR at the conjunction point between a HCG signal and the LCG signal, and eventually achieving improved image quality. At a start of a reset period, first and second reset transistors are switched into a conduction state. During a predetermined first period after the reset period starts, the first reset line is kept connected to a reset potential. After the first period elapses, the second reset transistor is switched into a non-conduction state to switch the first reset line into a floating state, so that the first reset line has high impedance. After a second period elapses and when the reset period ends, the first reset transistor is switched into the non-conduction state.

Abstract: In a pixel 200, a floating diffusion FD11 and a first capacitor CS11 are selectively connected to each other via a first connection element LG11-Tr, to change the capacitance of the floating diffusion FD11 between a first capacitance and a second capacitance, thereby changing the conversion gain between a first conversion gain (HCG) corresponding to the first capacitance and a second conversion gain (MCG) corresponding to the second capacitance. The floating diffusion FD11 and a second capacitor CS12 are connected together through a second connection element SG11-Tr to change the capacitance of the floating diffusion FD11 to a third capacitance, thereby changing the conversion gain of the source following transistor SF11-Tr to a third conversion gain (LCG) corresponding to the third capacitance.

Abstract: Provided are a solid-state imaging device, a method for driving a solid-state imaging device, and an electronic apparatus capable of reading signals produced with different conversion gains and having different signal directions. A pixel signal processing part 400 includes a first reading part 410 and a second reading part 420. Of a pixel signal PIXOUT input into an input node ND401, the first reading part 410 inverts the signal direction of a first-conversion-gain signal (HCGRST, HCGSIG) and outputs an inverted first-conversion-gain signal (HCGRST, HCGSIG), which has been subjected to inversion and amplification, to an AD converting part 430 via a connection node ND402. Of the pixel signal PIXOUT input into the input node ND401, the second reading part 420 keeps the signal direction of a second-conversion-gain signal (LCGSIG, LCGRST) unchanged, and outputs a non-inverted second-conversion-gain signal (LCGSIG, LCGRST) to the AD converting part 430 via the connection node ND402.

Abstract: In a pixel 200, a floating diffusion FD11 and a first capacitor CS11 are selectively connected to each other via a first connection element LG11-Tr, to change the capacitance of the floating diffusion FD11 between a first capacitance and a second capacitance, thereby changing the conversion gain between a first conversion gain (HCG) corresponding to the first capacitance and a second conversion gain (MCG) corresponding to the second capacitance.

Abstract: A pixel PXL includes a first photodiode PDSL and a second photodiode PSLS having different well capacities and responsivities, transfer transistors TGSL-Tr, TGLS-Tr for transferring the charges stored in the photodiodes to a floating diffusion FD, and a capacitance changing part 80 for changing the capacitance of the floating diffusion depending on a capacitance changing signal. The first well capacity of the first photodiode PDSL is smaller than the second well capacity of the second photodiode PDLS, and the first responsivity of the first photodiode PDSL is larger than the second responsivity of the second photodiode PDLS. With these configurations, it becomes possible to realize a widened dynamic range, prevent the read-out noise from affecting the performance, and eventually achieve improved image quality.

Abstract: Provided is a solid-state imaging device. A comparator is configured to perform a first comparing operation of outputting a digital first comparison result signal obtained by processing the overflow charges overflowing from PD1 to FD1 in the storing period, a second comparing operation of outputting a digital second comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period, and a third comparing operation of outputting a digital third comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period and the charges stored in the charge storing part, and a memory control part controls whether or not to allow writing of the data corresponding to the third comparison result signal into a memory part, depending on the states of the first and second comparison result signals.

Abstract: In a solid-state imaging device 10, the first binning switch 81 is formed such that a MOS capacitance and a wire capacitance of a wire connected to the binning switch 81, each having a value in accordance with an ON or OFF state, are added to a capacitance of a floating diffusion FD of a pixel PXL to be read, so as to optimize the capacitance of the floating diffusion FD and optimally adjust a conversion gain in accordance with a mode. This operation increases an image quality.

Abstract: Provided is a solid-state imaging device. A comparator is configured to perform a first comparing operation of outputting a digital first comparison result signal obtained by processing the overflow charges overflowing from PD1 to FD1 in the storing period, a second comparing operation of outputting a digital second comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period, and a third comparing operation of outputting a digital third comparison result signal obtained by processing the charges stored in PD1 that are transferred to FD1 in the transfer period and the charges stored in the charge storing part, and a memory control part controls whether or not to allow writing of the data corresponding to the third comparison result signal into a memory part, depending on the states of the first and second comparison result signals.

Abstract: A solid-state imaging device, in which a signal holding part can hold a signal with respect to a voltage signal corresponding to an accumulated charge in a photoelectric conversion element of a photodiode PD1 which is transferred to an output node of a floating diffusion FD1 in a transfer period after an integration period and a signal with respect to a voltage signal corresponding to an overflow charge overflowing to the output node of the floating diffusion FD1 from at least the photodiode PD1 in any period among the photoelectric conversion element of the photodiode PD1 and the storage capacity element of the storage capacitor. Due to this, substantially, it becomes possible to realize a broader dynamic range and higher frame rate.

Abstract: In a solid-state imaging device 10, the first binning switch 81 is formed such that a MOS capacitance and a wire capacitance of a wire connected to the binning switch 81, each having a value in accordance with an ON or OFF state, are added to a capacitance of a floating diffusion FD of a pixel PXL to be read, so as to optimize the capacitance of the floating diffusion FD and optimally adjust a conversion gain in accordance with a mode. This operation increases an image quality.

Abstract: An AD conversion part has a comparator for performing comparison processing comparing a voltage signal read out by a photoelectric converting and reading part and a reference voltage and outputting a digitalized comparison result signal, the comparator, under the control by a reading part, performs first comparison processing for outputting a digitalized first comparison result signal with respect to a voltage signal corresponding to an overflow charge overflowing from a photodiode PD1 to a floating diffusion FD1 in an integration period and second comparison processing for outputting a digitalized second comparison result signal with respect to a voltage signal corresponding to an accumulated charge of the photodiode PD1 transferred to the floating diffusion FD1 in a transfer period after the integration period. Due to this, it becomes possible to substantially realize a broader dynamic range and higher frame rate.

Abstract: A pixel PXL includes a first photodiode PDSL and a second photodiode PSLS having different well capacities and responsivities, transfer transistors TGSL-Tr, TGLS-Tr for transferring the charges stored in the photodiodes to a floating diffusion FD, and a capacitance changing part 80 for changing the capacitance of the floating diffusion depending on a capacitance changing signal. The first well capacity of the first photodiode PDSL is smaller than the second well capacity of the second photodiode PDLS, and the first responsivity of the first photodiode PDSL is larger than the second responsivity of the second photodiode PDLS. With these configurations, it becomes possible to realize a widened dynamic range, prevent the read-out noise from affecting the performance, and eventually achieve improved image quality.

Abstract: One object of the present invention is to provide a solid-state imaging device, a method for fabricating a solid-state imaging device, and an electronic apparatus that implement both a wide dynamic range and a high sensitivity. A storage capacitor serving as a storage capacitance element includes a first electrode and a second electrode on a second substrate surface side. The first electrode is formed of a p+ region (the second conductivity type semiconductor region) formed in the surface of a second substrate surface of a substrate, and the second electrode is formed above the second substrate surface so as to be opposed at a distance to the first electrode in the direction perpendicular to the substrate surface. The first electrode and the second electrode are arranged so as to spatially overlap with a photoelectric conversion part in the direction perpendicular to the substrate surface.

Abstract: A solid-state imaging device 10 includes a pixel portion 20 in which a plurality of pixels including photodiodes are arranged in rows and columns, a reading part 90 for reading pixel signals from the pixel portion, and a key generation part 82 which generates a unique key by using at least one of pixel fluctuation information or reading part fluctuation information. According to this configuration, the tamper resistance of the unique key can be secured and consequently alteration and falsification of images can be prevented.

Abstract: This solid-state imaging device 100 has: a photosensitive part that includes pixel portions 211, which are disposed in a matrix, and charge transfer parts 212 for transferring, by the column, the signal charge of the pixel portions; a plurality of charge storage parts 220 that accumulate the signal charges transferred by the plurality of charge transfer parts of the photosensitive part; a relay part 240 that relays the transfer of the signal charges transferred by the plurality of charge transfer parts to each charge storage part; an output part 230 that outputs the signal charges of the plurality of charge storage parts as electric signals; a first substrate 110 at which the photosensitive unit 210 is formed; and a second substrate 120 at which the charge storage part 220 and output unit 230 are formed.

Abstract: A solid state imaging device has: a photosensitive part containing a plurality of charge transfer parts that transfer, in column units, the signal charges of a plurality of photoelectric conversion elements disposed in a matrix; a conversion/output unit that converts, to an electrical signal, the signal charges forwarded by the charge transfer parts; a peripheral circuit part that performs a predetermined process with respect to the electrical signals from the conversion/output part; a relay part that relays the forwarding to the peripheral circuit part of the electrical signal from the conversion/output part; a first substrate where a photosensitive part and the conversion/output part are formed; and a second substrate where the peripheral circuit part is formed. The first and second substrates are stacked together, and the relay part electrically connects the conversion/output part formed at the first substrate to the peripheral circuit part formed at the second substrate.