Patents by Inventor Isao Takenaka
Isao Takenaka has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20190296694Abstract: A high-frequency front end circuit includes an antenna terminal, a reception circuit that is directly or indirectly connected to the antenna terminal, and a transmission circuit that is directly or indirectly connected to the antenna terminal, wherein the transmission circuit has an amplification circuit, the amplification circuit includes an input terminal and an output terminal, an amplification element provided on a path connecting the input terminal and the output terminal, and a bias circuit having an LC resonance circuit and connected to between the amplification element and the output terminal. A frequency pass band of the transmission circuit is lower than a frequency pass band of the reception circuit, and a value of a resonant frequency of the bias circuit is smaller than a value of a frequency pass band width of the transmission circuit.Type: ApplicationFiled: June 13, 2019Publication date: September 26, 2019Inventor: Isao TAKENAKA
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Publication number: 20190238164Abstract: A demultiplexing apparatus according to the present disclosure includes an amplifier that amplifies transmission signals in three or more communication bands having different frequency bands; multiple signal paths which are commonly provided for an output terminal of the amplifier and on which the signals in the corresponding communication bands are propagated; and multiple transmission-reception filters which are provided on the multiple signal paths, and each of which isolates a transmission signal and a reception signal of the corresponding communication band from each other. The gains of the amplifier in the frequency bands of multiple reception signals are smaller than the gains of the amplifier in the frequency bands of multiple transmission signals.Type: ApplicationFiled: April 8, 2019Publication date: August 1, 2019Inventor: Isao TAKENAKA
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Patent number: 10367455Abstract: A high-frequency front end circuit includes an antenna terminal, a reception circuit that is directly or indirectly connected to the antenna terminal, and a transmission circuit that is directly or indirectly connected to the antenna terminal, wherein the transmission circuit has an amplification circuit, the amplification circuit includes an input terminal and an output terminal, an amplification element provided on a path connecting the input terminal and the output terminal, and a bias circuit having an LC resonance circuit and connected to between the amplification element and the output terminal. A frequency pass band of the transmission circuit is lower than a frequency pass band of the reception circuit, and a value of a resonant frequency of the bias circuit is smaller than a value of a frequency pass band width of the transmission circuit.Type: GrantFiled: May 14, 2018Date of Patent: July 30, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Isao Takenaka
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Publication number: 20190158036Abstract: A PA module includes: a multilayer substrate having a ground pattern layer connected to a ground of a power source; amplifier transistors disposed on the multilayer substrate; a bypass capacitor having one end connected to the collector of the amplifier transistor; a first wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a second wiring line connecting the emitter of the amplifier transistor and the ground pattern layer to each other; a third wiring line connecting the other end of the bypass capacitor and the ground pattern layer to each other; and a fourth wiring line formed between the amplifier transistor and the ground pattern layer and between the bypass capacitor and the ground pattern layer and connecting the first wiring line and the third wiring line to each other.Type: ApplicationFiled: January 23, 2019Publication date: May 23, 2019Inventor: Isao TAKENAKA
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Patent number: 10298273Abstract: A demultiplexing apparatus according to the present disclosure includes an amplifier that amplifies transmission signals in three or more communication bands having different frequency bands; multiple signal paths which are commonly provided for an output terminal of the amplifier and on which the signals in the corresponding communication bands are propagated; and multiple transmission-reception filters which are provided on the multiple signal paths, and each of which isolates a transmission signal and a reception signal of the corresponding communication band from each other. The gains of the amplifier in the frequency bands of multiple reception signals are smaller than the gains of the amplifier in the frequency bands of multiple transmission signals.Type: GrantFiled: April 27, 2018Date of Patent: May 21, 2019Assignee: MURATA MANUFACTURING CO., LTD.Inventor: Isao Takenaka
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Publication number: 20180337638Abstract: A high-frequency front end circuit includes an antenna terminal, a reception circuit that is directly or indirectly connected to the antenna terminal, and a transmission circuit that is directly or indirectly connected to the antenna terminal, wherein the transmission circuit has an amplification circuit, the amplification circuit includes an input terminal and an output terminal, an amplification element provided on a path connecting the input terminal and the output terminal, and a bias circuit having an LC resonance circuit and connected to between the amplification element and the output terminal. A frequency pass band of the transmission circuit is lower than a frequency pass band of the reception circuit, and a value of a resonant frequency of the bias circuit is smaller than a value of a frequency pass band width of the transmission circuit.Type: ApplicationFiled: May 14, 2018Publication date: November 22, 2018Inventor: Isao TAKENAKA
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Publication number: 20180248569Abstract: A demultiplexing apparatus according to the present disclosure includes an amplifier that amplifies transmission signals in three or more communication bands having different frequency bands; multiple signal paths which are commonly provided for an output terminal of the amplifier and on which the signals in the corresponding communication bands are propagated; and multiple transmission-reception filters which are provided on the multiple signal paths, and each of which isolates a transmission signal and a reception signal of the corresponding communication band from each other. The gains of the amplifier in the frequency bands of multiple reception signals are smaller than the gains of the amplifier in the frequency bands of multiple transmission signals.Type: ApplicationFiled: April 27, 2018Publication date: August 30, 2018Inventor: Isao TAKENAKA
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Publication number: 20180109274Abstract: A high-frequency front-end circuit includes a communication band selection circuit, a high-frequency processing circuit, and a multi-band amplifier. The multi-band amplifier amplifies high-frequency signals in a plurality of communication bands. The communication band selection circuit is connected an output end of the multi-band amplifier. The communication band selection circuit includes a communication band selection switch. The high-frequency processing circuit is connected between a first connection line connecting the multi-band amplifier and the communication band selection circuit and a ground potential. The high-frequency processing circuit includes a passive element and an impedance selection switch. The passive element is connected between the first connection line and the ground potential.Type: ApplicationFiled: December 15, 2017Publication date: April 19, 2018Inventor: Isao TAKENAKA
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Publication number: 20160134244Abstract: A high-frequency module, includes a circuit substrate, a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The first transistor, the second transistor, the series circuit and the second resistive element are arranged on the circuit substrate.Type: ApplicationFiled: November 9, 2015Publication date: May 12, 2016Inventor: Isao TAKENAKA
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Patent number: 9209752Abstract: A high-frequency amplifier includes: a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The high-frequency amplifier can achieve low distortion characteristics while ensuring operational stability in a wide band.Type: GrantFiled: March 4, 2013Date of Patent: December 8, 2015Assignee: Renesas Electronics CorporationInventor: Isao Takenaka
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Publication number: 20130229237Abstract: A high-frequency amplifier includes: a first transistor having a source connected to ground; a second transistor forming a cascode circuit with the first transistor; a series circuit connected between a gate of the second transistor and the ground, the series circuit being formed by a first resistive element and a series resonant circuit connected in series with each other; and a second resistive element connected in parallel to the series circuit. The high-frequency amplifier can achieve low distortion characteristics while ensuring operational stability in a wide band.Type: ApplicationFiled: March 4, 2013Publication date: September 5, 2013Applicant: Renesas Electronics CorporationInventor: Isao TAKENAKA
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Patent number: 8431963Abstract: A field-effect transistor according to the present invention includes a silicon substrate that has a resistivity of not more than 0.02 ?·cm, a channel layer that is formed on the silicon substrate and has a thickness of at least 5 ?m, a barrier layer that is formed on the channel layer and supplies the channel layer with electrons, a two dimensional electron gas layer that is formed by a hetero junction between the channel layer and the barrier layer, a source electrode and a drain electrode that each form an ohmic contact with the barrier layer, and a gate electrode that is formed between the source electrode and the drain electrode, and forms a Schottky barrier junction with the barrier layer.Type: GrantFiled: April 29, 2010Date of Patent: April 30, 2013Assignee: Renesas Electronics CorporationInventors: Isao Takenaka, Kazunori Asano, Kohji Ishikura
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Patent number: 7843262Abstract: Disclosed a power amplifier including a main amplifier with class bias AB and a peak amplifier with class C bias. A quarter-wave length transmission line having a length equal to one-fourth of the wave-length of a fundamental frequency is connected to an output side of the peak amplifier. Outputs of the main amplifier and the peak amplifier are combined. An envelope amplifier that modulates the drain bias voltage in accordance with an envelope of the modulation wave input signal and an envelope detector are provided as a drain-bias circuit for the main amplifier (FIG. 1).Type: GrantFiled: January 12, 2009Date of Patent: November 30, 2010Assignee: NEC Electronics CorporationInventor: Isao Takenaka
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Publication number: 20100295097Abstract: A field-effect transistor according to the present invention includes a silicon substrate that has a resistivity of not more than 0.02 ?•cm, a channel layer that is formed on the silicon substrate and has a thickness of at least 5 ?m, a barrier layer that is formed on the channel layer and supplies the channel layer with electrons, a two dimensional electron gas layer that is formed by a hetero junction between the channel layer and the barrier layer, a source electrode and a drain electrode that each form an ohmic contact with the barrier layer, and a gate electrode that is formed between the source electrode and the drain electrode, and forms a Schottky barrier junction with the barrier layer.Type: ApplicationFiled: April 29, 2010Publication date: November 25, 2010Applicant: NEC ELECTRONICS CORPORATIONInventors: Isao Takenaka, Kazunori Asano, Kohji Ishikura
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Publication number: 20090179703Abstract: Disclosed a power amplifier including a main amplifier with class bias AB and a peak amplifier with class C bias. A quarter-wave length transmission line having a length equal to one-fourth of the wave-length of a fundamental frequency is connected to an output side of the peak amplifier. Outputs of the main amplifier and the peak amplifier are combined. An envelope amplifier that modulates the drain bias voltage in accordance with an envelope of the modulation wave input signal and an envelope detector are provided as a drain-bias circuit for the main amplifier (FIG. 1).Type: ApplicationFiled: January 12, 2009Publication date: July 16, 2009Applicant: NEC ELECTRONICS CORPORATIONInventor: Isao TAKENAKA
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Patent number: 6614311Abstract: A micro-wave power amplifier which amplifies a micro-wave signal including a plurality of carrier frequencies different from one another, includes (a) a field effect transistor having a grounded source, (b) a first difference frequency circuit which is electrically connected to a drain of the field effect transistor, and is short-circuited at a difference frequency between the carrier frequencies, and (c) a second difference frequency circuit which is electrically connected to a gate of the field effect transistor, and is short-circuited at a difference frequency between the carrier frequencies.Type: GrantFiled: November 29, 2001Date of Patent: September 2, 2003Assignee: NEC Compound Semiconductor Devices, Ltd.Inventor: Isao Takenaka
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Patent number: 6529099Abstract: A 180° phase shift circuit includes a balun having an unbalanced port and a pair of balanced ports, a pair of impedance matching lines each connected between one of the pair of balanced ports and one of a pair of balanced signal terminals, and a &lgr;g/2 distributed parameter line having ends each connected via a resistor to a node connecting together corresponding impedance matching line and corresponding balanced signal terminal.Type: GrantFiled: July 21, 2000Date of Patent: March 4, 2003Assignee: NEC Compound Semiconductor Devices, Ltd.Inventor: Isao Takenaka
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Publication number: 20020067212Abstract: A micro-wave power amplifier which amplifies a micro-wave signal including a plurality of carrier frequencies different from one another, includes (a) a field effect transistor having a grounded source, (b) a first difference frequency circuit which is electrically connected to a drain of the field effect transistor, and is short-circuited at a difference frequency between the carrier frequencies, and (c) a second difference frequency circuit which is electrically connected to a gate of the field effect transistor, and is short-circuited at a difference frequency between the carrier frequencies.Type: ApplicationFiled: November 29, 2001Publication date: June 6, 2002Applicant: NEC CorporationInventor: Isao Takenaka
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Patent number: 6396342Abstract: A microwave amplifier includes an amplifying device having a first contact region extending in a width direction, an output side impedance device spaced from the amplifying device in a transmission direction perpendicular to the width direction, the impedance device having a second contact region connected to the first contact region of the amplifying device, the second contact region extending in the width direction, and a smoothing circuit connected to one of the first and second contact regions for smoothing a distortion in a microwave signal to be amplified by the amplifying device.Type: GrantFiled: October 12, 2000Date of Patent: May 28, 2002Assignee: NEC CorporationInventor: Isao Takenaka
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Patent number: 6377134Abstract: A 180-degree phase shifter has two sets of transmission signal lines connected to one another and respectively coupled with an unbalanced signal transmission path connected to an input unbalanced signal terminal and a balanced signal transmission path connected output balanced signal terminals so that a designer can independently optimize the position of the input unbalanced signal terminal and the positions of the output balanced signal terminals.Type: GrantFiled: October 20, 1999Date of Patent: April 23, 2002Assignee: NEC CorporationInventor: Isao Takenaka