Patents by Inventor Isao Takinoue

Isao Takinoue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5675240
    Abstract: A switching regulator is composed of digital circuits only. A switching regulator (30) comprises a driver (2) for directly controlling the operation of a switching transistor (1), and an OR gate (6) for determining the logic issued by the driver (2). An output terminal (Q) of an RS flip-flop (5) is connected to one input end of the OR gate (6), the output of a timer (40c) is applied to a set terminal (S) of the RS flip-flop (5), and the output of a comparator (4) is applied to a reset terminal (R1) through an OR gate (7). At a non-reverse input end of the comparator (4), a reference voltage (VE) is applied by a D/A convertor (40b), while a feedback voltage (VFB) is applied to a reverse input end. Accordingly, chopping of the switching transistor (1) is done on the basis of a rectangular pulse.
    Type: Grant
    Filed: June 28, 1995
    Date of Patent: October 7, 1997
    Assignees: Mitsubishi Electric Semiconductor Software Corporation, Mitsubishi Denki Kabushiki Kaisha
    Inventors: Yukio Fujisawa, Isao Takinoue