Patents by Inventor Isao Yoshino

Isao Yoshino has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120193803
    Abstract: It is desired to enhance reliability of thermal coupling between a semiconductor chip and a radiating member. A driver assembly has a sheetlike wiring sheet on which lead wires are provided, a driver chip that is mounted over the wiring sheet and is electrically coupled to the lead wire, and a radiator plate in which a housing part for partially housing the driver chip is provided and that is thermally coupled to the driver chip, wherein the wiring sheet and the radiator plate are adhered to each other so as to sandwich the driver chip housed in the housing part between them, and a depth profile of the housing part is set so that the wiring sheet may approach toward the radiator plate side as the wiring sheet extends in such a direction that so as to separate from the driver chip.
    Type: Application
    Filed: February 1, 2012
    Publication date: August 2, 2012
    Inventors: Isao Yoshino, Toru Kume
  • Publication number: 20100295045
    Abstract: A tape carrier package includes: a tape base; and interconnections formed on the tape base and extending to intersect a cutting line. At least a slit is formed along each of the interconnections, to intersect the cutting line and to divide the interconnection into a plurality of interconnection elements.
    Type: Application
    Filed: May 19, 2010
    Publication date: November 25, 2010
    Applicant: Renesas Electronics Corporation
    Inventor: Isao Yoshino
  • Patent number: 5386138
    Abstract: A semiconductor device including first and second diodes which are provided on the same side of a semiconductor substrate of a first conductivity type and which are connected in series with each other through the substrate. A main surface of the substrate is covered with an insulator film having first and second windows. A first patterned conductive film of a second conductivity type is in contact with the main surface of the substrate through the first window. The first conductive film and the substrate forme a p-n junction of a first diode at their interface. A second patterned conductive film is formed on the first conductive film acting as one of electrodes of the semiconductor device. A first conductive region of the second conductivity type is formed in a surface area of the substrate adjacent to the main surface. The first conductive region and the substrate form a p-n junction of a second diode at their interface.
    Type: Grant
    Filed: June 3, 1994
    Date of Patent: January 31, 1995
    Assignee: NEC Corporation
    Inventor: Isao Yoshino