Patents by Inventor Isha AGRAWAL

Isha AGRAWAL has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11880216
    Abstract: Described embodiments include a voltage regulator circuit comprising an output voltage terminal configured to be coupled to a load that draws a load current, first and second amplifiers, and first, second, third, fourth and fifth transistors. The embodiment also includes a dynamic R-C network coupled between the third amplifier input and the seventh transistor current terminal, wherein the dynamic R-C network includes capacitors and MOS-based resistors, a third amplifier having a fourth amplifier input and a third amplifier output, wherein the fourth amplifier input is coupled to the output voltage terminal, and a capacitor that is coupled between the output voltage terminal and the fourth amplifier input.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: January 23, 2024
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishna Ankamreddi, Isha Agrawal, Rohit Phogat
  • Publication number: 20230213956
    Abstract: Described embodiments include a voltage regulator circuit comprising an output voltage terminal configured to be coupled to a load that draws a load current, first and second amplifiers, and first, second, third, fourth and fifth transistors. The embodiment also includes a dynamic R-C network coupled between the third amplifier input and the seventh transistor current terminal, wherein the dynamic R-C network includes capacitors and MOS-based resistors, a third amplifier having a fourth amplifier input and a third amplifier output, wherein the fourth amplifier input is coupled to the output voltage terminal, and a capacitor that is coupled between the output voltage terminal and the fourth amplifier input.
    Type: Application
    Filed: March 10, 2023
    Publication date: July 6, 2023
    Inventors: Ramakrishna Ankamreddi, Isha Agrawal, Rohit Phogat
  • Patent number: 11630472
    Abstract: Described embodiments include a voltage regulator circuit comprising an output voltage terminal configured to be coupled to a load that draws a load current, first and second amplifiers, and first, second, third, fourth and fifth transistors. The embodiment also includes a dynamic R-C network coupled between the third amplifier input and the seventh transistor current terminal, wherein the dynamic R-C network includes capacitors and MOS-based resistors, a third amplifier having a fourth amplifier input and a third amplifier output, wherein the fourth amplifier input is coupled to the output voltage terminal, and a capacitor that is coupled between the output voltage terminal and the fourth amplifier input.
    Type: Grant
    Filed: June 30, 2021
    Date of Patent: April 18, 2023
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Ramakrishna Ankamreddi, Isha Agrawal, Rohit Phogat
  • Publication number: 20220187863
    Abstract: Described embodiments include a voltage regulator circuit comprising an output voltage terminal configured to be coupled to a load that draws a load current, first and second amplifiers, and first, second, third, fourth and fifth transistors. The embodiment also includes a dynamic R-C network coupled between the third amplifier input and the seventh transistor current terminal, wherein the dynamic R-C network includes capacitors and MOS-based resistors, a third amplifier having a fourth amplifier input and a third amplifier output, wherein the fourth amplifier input is coupled to the output voltage terminal, and a capacitor that is coupled between the output voltage terminal and the fourth amplifier input.
    Type: Application
    Filed: June 30, 2021
    Publication date: June 16, 2022
    Inventors: Ramakrishna Ankamreddi, Isha Agrawal, Rohit Phogat
  • Patent number: 11316420
    Abstract: A circuit includes first and second transistors, an adaptive bias current source circuit, and an adaptive resistance circuit. The first transistor has a control terminal and first and second current terminals. The control terminal of the first transistor being a first input to the circuit. The second transistor has a control terminal and first and second current terminals, and the control terminal of the second transistor is a second input to the circuit. The first and second inputs are differential inputs to the circuit. The adaptive bias current source circuit is coupled to the second current terminal of the first transistor. The adaptive resistance circuit is coupled between the second current terminal of the second transistor and the adaptive bias current source circuit.
    Type: Grant
    Filed: December 17, 2020
    Date of Patent: April 26, 2022
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Rohit Phogat, Ramakrishna Ankamreddi, Isha Agrawal
  • Publication number: 20210194346
    Abstract: A circuit includes first and second transistors, an adaptive bias current source circuit, and an adaptive resistance circuit. The first transistor has a control terminal and first and second current terminals. The control terminal of the first transistor being a first input to the circuit. The second transistor has a control terminal and first and second current terminals, and the control terminal of the second transistor is a second input to the circuit. The first and second inputs are differential inputs to the circuit. The adaptive bias current source circuit is coupled to the second current terminal of the first transistor. The adaptive resistance circuit is coupled between the second current terminal of the second transistor and the adaptive bias current source circuit.
    Type: Application
    Filed: December 17, 2020
    Publication date: June 24, 2021
    Inventors: Rohit PHOGAT, Ramakrishna ANKAMREDDI, Isha AGRAWAL